void elog_add_boot_reason(void) { if (developer_mode_enabled()) { elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__); } else if (recovery_mode_enabled()) { u8 reason = 0; #if CONFIG_VBOOT_VERIFY_FIRMWARE struct vboot_handoff *vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); reason = get_recovery_mode_from_vbnv(); if (vbho && !reason) { VbSharedDataHeader *sd = (VbSharedDataHeader *) vbho->shared_data; reason = sd->recovery_reason; } #endif elog_add_event_byte(ELOG_TYPE_CROS_RECOVERY_MODE, reason ? reason : ELOG_CROS_RECOVERY_MODE_BUTTON); printk(BIOS_DEBUG, "%s: Logged recovery mode boot, " "reason: 0x%02x\n", __func__, reason); } else { printk(BIOS_DEBUG, "%s: Normal mode boot, nothing " "interesting to log\n", __func__); } }
static void igd_init(struct device *dev) { if (IS_ENABLED(CONFIG_GOP_SUPPORT)) return; /* IGD needs to be Bus Master */ u32 reg32 = pci_read_config32(dev, PCI_COMMAND); reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; pci_write_config32(dev, PCI_COMMAND, reg32); gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!gtt_res || !gtt_res->base) return; /* Wait for any configured pre-graphics delay */ if (!acpi_is_wakeup_s3()) { #if IS_ENABLED(CONFIG_CHROMEOS) if (developer_mode_enabled() || recovery_mode_enabled() || vboot_wants_oprom()) mdelay(CONFIG_PRE_GRAPHICS_DELAY); #else mdelay(CONFIG_PRE_GRAPHICS_DELAY); #endif } /* Initialize PCI device, load/execute BIOS Option ROM */ pci_dev_init(dev); #if IS_ENABLED(CONFIG_CHROMEOS) if (!gfx_get_init_done() && !acpi_is_wakeup_s3()) { /* * Enable DDI-A if the Option ROM did not execute: * * bit 0: Display detected (RO) * bit 4: DDI A supports 4 lanes and DDI E is not used * bit 7: DDI buffer is idle */ gtt_write(DDI_BUF_CTL_A, DDI_BUF_IS_IDLE | DDI_A_4_LANES | DDI_INIT_DISPLAY_DETECTED); } #endif }