void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t * dma_handle, gfp_t gfp) { #ifdef CONFIG_MSTAR_CHIP extern int hw_coherentio; #endif void *ret; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; gfp = massage_gfp_flags(dev, gfp); ret = (void *) __get_free_pages(gfp, get_order(size)); if (ret) { memset(ret, 0, size); *dma_handle = plat_map_dma_mem(dev, ret, size); if (!plat_device_is_coherent(dev)) { dma_cache_wback_inv((unsigned long) ret, size); #ifdef CONFIG_MSTAR_CHIP if (!hw_coherentio) #endif ret = UNCAC_ADDR(ret); } } return ret; }
void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) return memory; if (!dev) dev = &x86_dma_fallback_dev; if (!is_device_dma_capable(dev)) return NULL; if (!ops->alloc) return NULL; memory = ops->alloc(dev, size, dma_handle, dma_alloc_coherent_gfp_flags(dev, gfp), attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; }
static void *octeon_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { void *ret; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; /* ignore region specifiers */ gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); #ifdef CONFIG_ZONE_DMA if (dev == NULL) gfp |= __GFP_DMA; else if (dev->coherent_dma_mask <= DMA_BIT_MASK(24)) gfp |= __GFP_DMA; else #endif #ifdef CONFIG_ZONE_DMA32 if (dev->coherent_dma_mask <= DMA_BIT_MASK(32)) gfp |= __GFP_DMA32; else #endif ; /* Don't invoke OOM killer */ gfp |= __GFP_NORETRY; ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp); mb(); return ret; }
static void *mips_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs) { void *ret; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; gfp = massage_gfp_flags(dev, gfp); ret = (void *) __get_free_pages(gfp, get_order(size)); if (ret) { memset(ret, 0, size); *dma_handle = plat_map_dma_mem(dev, ret, size); if (!plat_device_is_coherent(dev)) { dma_cache_wback_inv((unsigned long) ret, size); if (!hw_coherentio) ret = UNCAC_ADDR(ret); } } return ret; }
static void *mips_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t * dma_handle, gfp_t gfp) { void *ret; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; gfp = massage_gfp_flags(dev, gfp); ret = (void *) __get_free_pages(gfp, get_order(size)); if (ret) { memset(ret, 0, size); *dma_handle = plat_map_dma_mem(dev, ret, size); if (!plat_device_is_coherent(dev)) { dma_cache_wback_inv((unsigned long) ret, size); #ifdef CONFIG_BRCM_CONSISTENT_DMA if (brcm_map_coherent(*dma_handle, ret, PFN_ALIGN(size), &ret, gfp)) { free_pages((unsigned long)ret, size); ret = NULL; } #else ret = UNCAC_ADDR(ret); #endif } } return ret; }
static void *mips_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs) { void *ret; struct page *page = NULL; unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; gfp = massage_gfp_flags(dev, gfp); if (IS_ENABLED(CONFIG_DMA_CMA) && !(gfp & GFP_ATOMIC)) page = dma_alloc_from_contiguous(dev, count, get_order(size)); if (!page) page = alloc_pages(gfp, get_order(size)); if (!page) return NULL; ret = page_address(page); memset(ret, 0, size); *dma_handle = plat_map_dma_mem(dev, ret, size); if (!plat_device_is_coherent(dev)) { dma_cache_wback_inv((unsigned long) ret, size); if (!hw_coherentio) ret = UNCAC_ADDR(ret); } return ret; }
/* * Allocate DMA-coherent memory space and return both the kernel remapped * virtual and bus address for that space. */ void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) { void *memory; if (dma_alloc_from_coherent(dev, size, handle, &memory)) return memory; return __dma_alloc(dev, size, handle, gfp, pgprot_dmacoherent(pgprot_kernel)); }
static void *loongson_dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { void *ret; if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; /* ignore region specifiers */ gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); #ifdef CONFIG_ZONE_DMA if (dev == NULL) gfp |= __GFP_DMA; else if (dev->coherent_dma_mask <= DMA_BIT_MASK(24)) gfp |= __GFP_DMA; else #endif #ifdef CONFIG_ZONE_DMA32 if (dev == NULL) gfp |= __GFP_DMA32; else if (dev->coherent_dma_mask <= DMA_BIT_MASK(32)) gfp |= __GFP_DMA32; else #endif ; /* Don't invoke OOM killer */ gfp |= __GFP_NORETRY; ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp); #ifdef LOONGSON_BIGMEM_DEBUG if((*dma_handle >= 0x90000000) || (*dma_handle < 0x80000000)){ printk("+++%s %s: *dma_handle(0x%lx)\n", __FILE__, __func__, *dma_handle); dump_stack(); } #endif mb(); return ret; }
void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { void *ret; int order = get_order(size); gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) return ret; if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) gfp |= GFP_DMA; ret = (void *)__get_free_pages(gfp, order); if (ret != NULL) { memset(ret, 0, size); *dma_handle = virt_to_phys(ret); } return ret; }