/* Create the device specific context.
*/
GLboolean r128CreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate )
{
GLcontext *ctx, *shareCtx;
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
struct dd_function_table functions;
r128ContextPtr rmesa;
r128ScreenPtr r128scrn;
int i;
/* Allocate the r128 context */
rmesa = (r128ContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* Init default driver functions then plug in our Radeon-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
r128InitDriverFuncs( &functions );
r128InitIoctlFuncs( &functions );
r128InitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((r128ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
&functions, (void *) rmesa);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
ctx = rmesa->glCtx;
rmesa->driContext = driContextPriv;
rmesa->driScreen = sPriv;
rmesa->driDrawable = NULL;
rmesa->hHWContext = driContextPriv->hHWContext;
rmesa->driHwLock = &sPriv->pSAREA->lock;
rmesa->driFd = sPriv->fd;
r128scrn = rmesa->r128Screen = (r128ScreenPtr)(sPriv->private);
/* Parse configuration files */
driParseConfigFiles (&rmesa->optionCache, &r128scrn->optionCache,
r128scrn->driScreen->myNum, "r128");
rmesa->sarea = (drm_r128_sarea_t *)((char *)sPriv->pSAREA +
r128scrn->sarea_priv_offset);
rmesa->CurrentTexObj[0] = NULL;
rmesa->CurrentTexObj[1] = NULL;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = r128scrn->numTexHeaps;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
r128scrn->texSize[i],
12,
R128_NR_TEX_REGIONS,
(drmTextureRegionPtr)rmesa->sarea->tex_list[i],
&rmesa->sarea->tex_age[i],
&rmesa->swapped,
sizeof( r128TexObj ),
(destroy_texture_object_t *) r128DestroyTexObj );
driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
& rmesa->c_textureSwaps );
}
rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
"texture_depth");
if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
rmesa->texture_depth = ( r128scrn->cpp == 4 ) ?
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
rmesa->RenderIndex = -1; /* Impossible value */
rmesa->vert_buf = NULL;
rmesa->num_verts = 0;
RENDERINPUTS_ONES( rmesa->tnl_state_bitset );
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have them both in
* texturable memory at once.
*/
ctx->Const.MaxTextureUnits = 2;
ctx->Const.MaxTextureImageUnits = 2;
ctx->Const.MaxTextureCoordUnits = 2;
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
10, /* max 2D texture size is 1024x1024 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
11,
GL_FALSE,
0 );
/* No wide points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
/* No wide lines.
*/
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 1.0;
ctx->Const.MaxLineWidthAA = 1.0;
ctx->Const.LineWidthGranularity = 1.0;
ctx->Const.MaxDrawBuffers = 1;
#if ENABLE_PERF_BOXES
rmesa->boxes = driQueryOptionb(&rmesa->optionCache, "performance_boxes");
#endif
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
/* _tnl_destroy_pipeline( ctx ); */
/* _tnl_install_pipeline( ctx, r128_pipeline ); */
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (sPriv->drm_version.minor >= 4)
_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
r128InitTriFuncs( ctx );
r128DDInitStateFuncs( ctx );
r128DDInitSpanFuncs( ctx );
r128DDInitState( rmesa );
driContextPriv->driverPrivate = (void *)rmesa;
#if DO_DEBUG
R128_DEBUG = driParseDebugString( getenv( "R128_DEBUG" ),
debug_control );
#endif
if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(rmesa, R128_FALLBACK_DISABLE, 1);
}
return GL_TRUE;
}
/* Create the device specific context.
*/
GLboolean r128CreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate )
{
GLcontext *ctx, *shareCtx;
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
r128ContextPtr rmesa;
r128ScreenPtr r128scrn;
int i;
/* Allocate the r128 context */
rmesa = (r128ContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((r128ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa, GL_TRUE);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
ctx = rmesa->glCtx;
rmesa->driContext = driContextPriv;
rmesa->driScreen = sPriv;
rmesa->driDrawable = NULL;
rmesa->hHWContext = driContextPriv->hHWContext;
rmesa->driHwLock = &sPriv->pSAREA->lock;
rmesa->driFd = sPriv->fd;
r128scrn = rmesa->r128Screen = (r128ScreenPtr)(sPriv->private);
rmesa->sarea = (R128SAREAPrivPtr)((char *)sPriv->pSAREA +
r128scrn->sarea_priv_offset);
rmesa->CurrentTexObj[0] = NULL;
rmesa->CurrentTexObj[1] = NULL;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = r128scrn->numTexHeaps;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
r128scrn->texSize[i],
12,
R128_NR_TEX_REGIONS,
rmesa->sarea->texList[i],
& rmesa->sarea->texAge[i],
& rmesa->swapped,
sizeof( r128TexObj ),
(destroy_texture_object_t *) r128DestroyTexObj );
driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
& rmesa->c_textureSwaps );
}
rmesa->RenderIndex = -1; /* Impossible value */
rmesa->vert_buf = NULL;
rmesa->num_verts = 0;
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have them both in
* texturable memory at once.
*/
ctx->Const.MaxTextureUnits = 2;
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
10, /* max 2D texture size is 1024x1024 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
11,
GL_FALSE );
/* No wide points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
/* No wide lines.
*/
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 1.0;
ctx->Const.MaxLineWidthAA = 1.0;
ctx->Const.LineWidthGranularity = 1.0;
#if ENABLE_PERF_BOXES
rmesa->boxes = (getenv( "LIBGL_PERFORMANCE_BOXES" ) != NULL);
#endif
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_ac_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
/* _tnl_destroy_pipeline( ctx ); */
/* _tnl_install_pipeline( ctx, r128_pipeline ); */
/* Configure swrast to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (sPriv->drmMinor >= 4)
_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
r128InitVB( ctx );
r128InitTriFuncs( ctx );
r128DDInitDriverFuncs( ctx );
r128DDInitIoctlFuncs( ctx );
r128DDInitStateFuncs( ctx );
r128DDInitSpanFuncs( ctx );
r128DDInitTextureFuncs( ctx );
r128DDInitState( rmesa );
rmesa->do_irqs = (rmesa->r128Screen->irq && !getenv("R128_NO_IRQS"));
rmesa->vblank_flags = (rmesa->r128Screen->irq != 0)
? driGetDefaultVBlankFlags() : VBLANK_FLAG_NO_IRQ;
driContextPriv->driverPrivate = (void *)rmesa;
#if DO_DEBUG
R128_DEBUG = driParseDebugString( getenv( "R128_DEBUG" ),
debug_control );
#endif
return GL_TRUE;
}
/* Create the device specific context.
*/
GLboolean mach64CreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate )
{
GLcontext *ctx, *shareCtx;
__DRIscreenPrivate *driScreen = driContextPriv->driScreenPriv;
struct dd_function_table functions;
mach64ContextPtr mmesa;
mach64ScreenPtr mach64Screen;
int i, heap;
GLuint *c_textureSwapsPtr = NULL;
#if DO_DEBUG
MACH64_DEBUG = driParseDebugString(getenv("MACH64_DEBUG"), debug_control);
#endif
/* Allocate the mach64 context */
mmesa = (mach64ContextPtr) CALLOC( sizeof(*mmesa) );
if ( !mmesa )
return GL_FALSE;
/* Init default driver functions then plug in our Mach64-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
mach64InitDriverFuncs( &functions );
mach64InitIoctlFuncs( &functions );
mach64InitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((mach64ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
mmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
&functions, (void *)mmesa);
if (!mmesa->glCtx) {
FREE(mmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = mmesa;
ctx = mmesa->glCtx;
mmesa->driContext = driContextPriv;
mmesa->driScreen = driScreen;
mmesa->driDrawable = NULL;
mmesa->hHWContext = driContextPriv->hHWContext;
mmesa->driHwLock = &driScreen->pSAREA->lock;
mmesa->driFd = driScreen->fd;
mach64Screen = mmesa->mach64Screen = (mach64ScreenPtr)driScreen->private;
/* Parse configuration files */
driParseConfigFiles (&mmesa->optionCache, &mach64Screen->optionCache,
mach64Screen->driScreen->myNum, "mach64");
mmesa->sarea = (drm_mach64_sarea_t *)((char *)driScreen->pSAREA +
sizeof(drm_sarea_t));
mmesa->CurrentTexObj[0] = NULL;
mmesa->CurrentTexObj[1] = NULL;
(void) memset( mmesa->texture_heaps, 0, sizeof( mmesa->texture_heaps ) );
make_empty_list( &mmesa->swapped );
mmesa->firstTexHeap = mach64Screen->firstTexHeap;
mmesa->lastTexHeap = mach64Screen->firstTexHeap + mach64Screen->numTexHeaps;
for ( i = mmesa->firstTexHeap ; i < mmesa->lastTexHeap ; i++ ) {
mmesa->texture_heaps[i] = driCreateTextureHeap( i, mmesa,
mach64Screen->texSize[i],
6, /* align to 64-byte boundary, use 12 for page-size boundary */
MACH64_NR_TEX_REGIONS,
(drmTextureRegionPtr)mmesa->sarea->tex_list[i],
&mmesa->sarea->tex_age[i],
&mmesa->swapped,
sizeof( mach64TexObj ),
(destroy_texture_object_t *) mach64DestroyTexObj );
#if ENABLE_PERF_BOXES
c_textureSwapsPtr = & mmesa->c_textureSwaps;
#endif
driSetTextureSwapCounterLocation( mmesa->texture_heaps[i],
c_textureSwapsPtr );
}
mmesa->RenderIndex = -1; /* Impossible value */
mmesa->vert_buf = NULL;
mmesa->num_verts = 0;
mmesa->new_state = MACH64_NEW_ALL;
mmesa->dirty = MACH64_UPLOAD_ALL;
/* Set the maximum texture size small enough that we can
* guarentee that both texture units can bind a maximal texture
* and have them both in memory (on-card or AGP) at once.
* Test for 2 textures * bytes/texel * size * size. There's no
* need to account for mipmaps since we only upload one level.
*/
ctx->Const.MaxTextureUnits = 2;
ctx->Const.MaxTextureImageUnits = 2;
ctx->Const.MaxTextureCoordUnits = 2;
heap = mach64Screen->IsPCI ? MACH64_CARD_HEAP : MACH64_AGP_HEAP;
driCalculateMaxTextureLevels( & mmesa->texture_heaps[heap],
1,
& ctx->Const,
mach64Screen->cpp,
10, /* max 2D texture size is 1024x1024 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
0, /* texture rectangles unsupported. */
1, /* mipmapping unsupported. */
GL_TRUE, /* need to have both textures in
either local or AGP memory */
0 );
#if ENABLE_PERF_BOXES
mmesa->boxes = ( getenv( "LIBGL_PERFORMANCE_BOXES" ) != NULL );
#endif
/* Allocate the vertex buffer
*/
mmesa->vert_buf = ALIGN_MALLOC(MACH64_BUFFER_SIZE, 32);
if ( !mmesa->vert_buf )
return GL_FALSE;
mmesa->vert_used = 0;
mmesa->vert_total = MACH64_BUFFER_SIZE;
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
/* Install the customized pipeline:
*/
/* _tnl_destroy_pipeline( ctx ); */
/* _tnl_install_pipeline( ctx, mach64_pipeline ); */
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
driInitExtensions( ctx, card_extensions, GL_TRUE );
mach64InitVB( ctx );
mach64InitTriFuncs( ctx );
mach64DDInitStateFuncs( ctx );
mach64DDInitSpanFuncs( ctx );
mach64DDInitState( mmesa );
mmesa->do_irqs = (mmesa->mach64Screen->irq && !getenv("MACH64_NO_IRQS"));
mmesa->vblank_flags = (mmesa->do_irqs)
? driGetDefaultVBlankFlags(&mmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
driContextPriv->driverPrivate = (void *)mmesa;
if (driQueryOptionb(&mmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(mmesa, MACH64_FALLBACK_DISABLE, 1);
}
return GL_TRUE;
}
/* Create the device specific rendering context.
*/
GLboolean r200CreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate)
{
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
struct dd_function_table functions;
r200ContextPtr rmesa;
GLcontext *ctx, *shareCtx;
int i;
int tcl_mode, fthrottle_mode;
assert(glVisual);
assert(driContextPriv);
assert(screen);
/* Allocate the R200 context */
rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* init exp fog table data */
r200InitStaticFogData();
/* Parse configuration files.
* Do this here so that initialMaxAnisotropy is set before we create
* the default textures.
*/
driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
screen->driScreen->myNum, "r200");
rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
"def_max_anisotropy");
if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
if ( sPriv->drmMinor < 13 )
fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
"disabling.\n",sPriv->drmMinor );
else
rmesa->using_hyperz = GL_TRUE;
}
if ( sPriv->drmMinor >= 15 )
rmesa->texmicrotile = GL_TRUE;
/* Init default driver functions then plug in our R200-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions(&functions);
r200InitDriverFuncs(&functions);
r200InitIoctlFuncs(&functions);
r200InitStateFuncs(&functions);
r200InitTextureFuncs(&functions);
r200InitShaderFuncs(&functions);
/* Allocate and initialize the Mesa context */
if (sharedContextPrivate)
shareCtx = ((r200ContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
&functions, (void *) rmesa);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
/* Init r200 context data */
rmesa->dri.context = driContextPriv;
rmesa->dri.screen = sPriv;
rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
rmesa->dri.hwContext = driContextPriv->hHWContext;
rmesa->dri.hwLock = &sPriv->pSAREA->lock;
rmesa->dri.fd = sPriv->fd;
rmesa->dri.drmMinor = sPriv->drmMinor;
rmesa->r200Screen = screen;
rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
rmesa->dma.buf0_address = rmesa->r200Screen->buffers->list[0].address;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = 1 /* screen->numTexHeaps */ ;
assert(rmesa->nr_heaps < RADEON_NR_TEX_HEAPS);
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
screen->texSize[i],
12,
RADEON_NR_TEX_REGIONS,
(drmTextureRegionPtr)rmesa->sarea->tex_list[i],
& rmesa->sarea->tex_age[i],
& rmesa->swapped,
sizeof( r200TexObj ),
(destroy_texture_object_t *) r200DestroyTexObj );
}
rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
"texture_depth");
if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
rmesa->texture_depth = ( screen->cpp == 4 ) ?
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
rmesa->swtcl.RenderIndex = ~0;
rmesa->hw.all_dirty = 1;
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have all of them in
* texturable memory at once. Depending on the allow_large_textures driconf
* setting allow larger textures.
*/
ctx = rmesa->glCtx;
ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->optionCache,
"texture_units");
ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
i = driQueryOptioni( &rmesa->optionCache, "allow_large_textures");
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
11, /* max 2D texture size is 2048x2048 */
#if ENABLE_HW_3D_TEXTURE
8, /* max 3D texture size is 256^3 */
#else
0, /* 3D textures unsupported */
#endif
11, /* max cube texture size is 2048x2048 */
11, /* max texture rectangle size is 2048x2048 */
12,
GL_FALSE,
i );
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
/* No wide AA points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
ctx->Const.PointSizeGranularity = 0.0625;
if (rmesa->r200Screen->drmSupportsPointSprites)
ctx->Const.MaxPointSize = 2047.0;
else
ctx->Const.MaxPointSize = 1.0;
/* mesa initialization problem - _mesa_init_point was already called */
ctx->Point.MaxSize = ctx->Const.MaxPointSize;
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 10.0;
ctx->Const.MaxLineWidthAA = 10.0;
ctx->Const.LineWidthGranularity = 0.0625;
ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
ctx->Const.VertexProgram.MaxNativeAttribs = 12;
ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
_ae_create_context( ctx );
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline( ctx );
_tnl_install_pipeline( ctx, r200_pipeline );
/* Try and keep materials and vertices separate:
*/
/* _tnl_isolate_materials( ctx, GL_TRUE ); */
/* Configure swrast and TNL to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
_math_matrix_ctr( &rmesa->TexGenMatrix[i] );
_math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
}
_math_matrix_ctr( &rmesa->tmpmat );
_math_matrix_set_identity( &rmesa->tmpmat );
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (!(rmesa->r200Screen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
/* yuv textures don't work with some chips - R200 / rv280 okay so far
others get the bit ordering right but don't actually do YUV-RGB conversion */
_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
}
if (rmesa->glCtx->Mesa_DXTn) {
_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
_mesa_enable_extension( ctx, "GL_S3_s3tc" );
}
else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
}
if (rmesa->r200Screen->drmSupportsCubeMapsR200)
_mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
if (rmesa->r200Screen->drmSupportsBlendColor) {
driInitExtensions( ctx, blend_extensions, GL_FALSE );
}
if(rmesa->r200Screen->drmSupportsVertexProgram)
driInitSingleExtension( ctx, ARB_vp_extension );
if(driQueryOptionb(&rmesa->optionCache, "nv_vertex_program"))
driInitSingleExtension( ctx, NV_vp_extension );
if ((ctx->Const.MaxTextureUnits == 6) && rmesa->r200Screen->drmSupportsFragShader)
driInitSingleExtension( ctx, ATI_fs_extension );
if (rmesa->r200Screen->drmSupportsPointSprites)
driInitExtensions( ctx, point_extensions, GL_FALSE );
#if 0
r200InitDriverFuncs( ctx );
r200InitIoctlFuncs( ctx );
r200InitStateFuncs( ctx );
r200InitTextureFuncs( ctx );
#endif
/* plug in a few more device driver functions */
/* XXX these should really go right after _mesa_init_driver_functions() */
r200InitPixelFuncs( ctx );
r200InitSpanFuncs( ctx );
r200InitTnlFuncs( ctx );
r200InitState( rmesa );
r200InitSwtcl( ctx );
fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
rmesa->iw.irq_seq = -1;
rmesa->irqsEmitted = 0;
rmesa->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
rmesa->r200Screen->irq);
rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
if (!rmesa->do_irqs)
fprintf(stderr,
"IRQ's not enabled, falling back to %s: %d %d\n",
rmesa->do_usleeps ? "usleeps" : "busy waits",
fthrottle_mode,
rmesa->r200Screen->irq);
rmesa->vblank_flags = (rmesa->r200Screen->irq != 0)
? driGetDefaultVBlankFlags(&rmesa->optionCache) : VBLANK_FLAG_NO_IRQ;
rmesa->prefer_gart_client_texturing =
(getenv("R200_GART_CLIENT_TEXTURES") != 0);
(*dri_interface->getUST)( & rmesa->swap_ust );
#if DO_DEBUG
R200_DEBUG = driParseDebugString( getenv( "R200_DEBUG" ),
debug_control );
R200_DEBUG |= driParseDebugString( getenv( "RADEON_DEBUG" ),
debug_control );
#endif
tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
}
else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
!(rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL)) {
if (rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL) {
rmesa->r200Screen->chip_flags &= ~RADEON_CHIPSET_TCL;
fprintf(stderr, "Disabling HW TCL support\n");
}
TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
}
return GL_TRUE;
}
/* Create the device specific context.
*/
GLboolean
radeonCreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate)
{
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
struct dd_function_table functions;
radeonContextPtr rmesa;
GLcontext *ctx, *shareCtx;
int i;
int tcl_mode, fthrottle_mode;
assert(glVisual);
assert(driContextPriv);
assert(screen);
/* Allocate the Radeon context */
rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* init exp fog table data */
radeonInitStaticFogData();
/* Parse configuration files.
* Do this here so that initialMaxAnisotropy is set before we create
* the default textures.
*/
driParseConfigFiles (&rmesa->optionCache, &screen->optionCache,
screen->driScreen->myNum, "radeon");
rmesa->initialMaxAnisotropy = driQueryOptionf(&rmesa->optionCache,
"def_max_anisotropy");
if ( driQueryOptionb( &rmesa->optionCache, "hyperz" ) ) {
if ( sPriv->drm_version.minor < 13 )
fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
"disabling.\n", sPriv->drm_version.minor );
else
rmesa->using_hyperz = GL_TRUE;
}
if ( sPriv->drm_version.minor >= 15 )
rmesa->texmicrotile = GL_TRUE;
/* Init default driver functions then plug in our Radeon-specific functions
* (the texture functions are especially important)
*/
_mesa_init_driver_functions( &functions );
radeonInitDriverFuncs( &functions );
radeonInitTextureFuncs( &functions );
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(glVisual, shareCtx,
&functions, (void *) rmesa);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
/* Init radeon context data */
rmesa->dri.context = driContextPriv;
rmesa->dri.screen = sPriv;
rmesa->dri.drawable = NULL;
rmesa->dri.readable = NULL;
rmesa->dri.hwContext = driContextPriv->hHWContext;
rmesa->dri.hwLock = &sPriv->pSAREA->lock;
rmesa->dri.fd = sPriv->fd;
rmesa->dri.drmMinor = sPriv->drm_version.minor;
rmesa->radeonScreen = screen;
rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = screen->numTexHeaps;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
screen->texSize[i],
12,
RADEON_NR_TEX_REGIONS,
(drmTextureRegionPtr)rmesa->sarea->tex_list[i],
& rmesa->sarea->tex_age[i],
& rmesa->swapped,
sizeof( radeonTexObj ),
(destroy_texture_object_t *) radeonDestroyTexObj );
driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
& rmesa->c_textureSwaps );
}
rmesa->texture_depth = driQueryOptioni (&rmesa->optionCache,
"texture_depth");
if (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
rmesa->texture_depth = ( screen->cpp == 4 ) ?
DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
rmesa->swtcl.RenderIndex = ~0;
rmesa->hw.all_dirty = GL_TRUE;
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have all of them in
* texturable memory at once. Depending on the allow_large_textures driconf
* setting allow larger textures.
*/
ctx = rmesa->glCtx;
ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->optionCache,
"texture_units");
ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
i = driQueryOptioni( &rmesa->optionCache, "allow_large_textures");
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
11, /* max 2D texture size is 2048x2048 */
8, /* 256^3 */
9, /* \todo: max cube texture size seems to be 512x512(x6) */
11, /* max rect texture size is 2048x2048. */
12,
GL_FALSE,
i );
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
/* No wide points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 10.0;
ctx->Const.MaxLineWidthAA = 10.0;
ctx->Const.LineWidthGranularity = 0.0625;
/* Set maxlocksize (and hence vb size) small enough to avoid
* fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
* fit in a single dma buffer for indexed rendering of quad strips,
* etc.
*/
ctx->Const.MaxArrayLockSize =
MIN2( ctx->Const.MaxArrayLockSize,
RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
rmesa->boxes = 0;
ctx->Const.MaxDrawBuffers = 1;
_mesa_set_mvp_with_dp4( ctx, GL_TRUE );
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_vbo_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
_ae_create_context( ctx );
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline( ctx );
_tnl_install_pipeline( ctx, radeon_pipeline );
/* Try and keep materials and vertices separate:
*/
/* _tnl_isolate_materials( ctx, GL_TRUE ); */
/* Configure swrast and T&L to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_tnl_allow_pixel_fog( ctx, GL_FALSE );
_tnl_allow_vertex_fog( ctx, GL_TRUE );
for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) {
_math_matrix_ctr( &rmesa->TexGenMatrix[i] );
_math_matrix_ctr( &rmesa->tmpmat[i] );
_math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
_math_matrix_set_identity( &rmesa->tmpmat[i] );
}
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (rmesa->radeonScreen->drmSupportsCubeMapsR100)
_mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
if (rmesa->glCtx->Mesa_DXTn) {
_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
_mesa_enable_extension( ctx, "GL_S3_s3tc" );
}
else if (driQueryOptionb (&rmesa->optionCache, "force_s3tc_enable")) {
_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
}
if (rmesa->dri.drmMinor >= 9)
_mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
/* XXX these should really go right after _mesa_init_driver_functions() */
radeonInitIoctlFuncs( ctx );
radeonInitStateFuncs( ctx );
radeonInitSpanFuncs( ctx );
radeonInitState( rmesa );
radeonInitSwtcl( ctx );
_mesa_vector4f_alloc( &rmesa->tcl.ObjClean, 0,
ctx->Const.MaxArrayLockSize, 32 );
fthrottle_mode = driQueryOptioni(&rmesa->optionCache, "fthrottle_mode");
rmesa->iw.irq_seq = -1;
rmesa->irqsEmitted = 0;
rmesa->do_irqs = (rmesa->radeonScreen->irq != 0 &&
fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
(*sPriv->systemTime->getUST)( & rmesa->swap_ust );
#if DO_DEBUG
RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
debug_control );
#endif
tcl_mode = driQueryOptioni(&rmesa->optionCache, "tcl_mode");
if (driQueryOptionb(&rmesa->optionCache, "no_rast")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
} else if (tcl_mode == DRI_CONF_TCL_SW ||
!(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
rmesa->radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
fprintf(stderr, "Disabling HW TCL support\n");
}
TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
}
if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
/* _tnl_need_dlist_norm_lengths( ctx, GL_FALSE ); */
}
return GL_TRUE;
}
/* Create the device specific context.
*/
GLboolean
radeonCreateContext( const __GLcontextModes *glVisual,
__DRIcontextPrivate *driContextPriv,
void *sharedContextPrivate)
{
__DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
radeonContextPtr rmesa;
GLcontext *ctx, *shareCtx;
int i;
assert(glVisual);
assert(driContextPriv);
assert(screen);
/* Allocate the Radeon context */
rmesa = (radeonContextPtr) CALLOC( sizeof(*rmesa) );
if ( !rmesa )
return GL_FALSE;
/* Allocate the Mesa context */
if (sharedContextPrivate)
shareCtx = ((radeonContextPtr) sharedContextPrivate)->glCtx;
else
shareCtx = NULL;
rmesa->glCtx = _mesa_create_context(glVisual, shareCtx, (void *) rmesa, GL_TRUE);
if (!rmesa->glCtx) {
FREE(rmesa);
return GL_FALSE;
}
driContextPriv->driverPrivate = rmesa;
/* Init radeon context data */
rmesa->dri.context = driContextPriv;
rmesa->dri.screen = sPriv;
rmesa->dri.drawable = NULL; /* Set by XMesaMakeCurrent */
rmesa->dri.hwContext = driContextPriv->hHWContext;
rmesa->dri.hwLock = &sPriv->pSAREA->lock;
rmesa->dri.fd = sPriv->fd;
rmesa->dri.drmMinor = sPriv->drmMinor;
rmesa->radeonScreen = screen;
rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
rmesa->nr_heaps = screen->numTexHeaps;
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
rmesa->texture_heaps[i] = driCreateTextureHeap( i, rmesa,
screen->texSize[i],
12,
RADEON_NR_TEX_REGIONS,
rmesa->sarea->texList[i],
& rmesa->sarea->texAge[i],
& rmesa->swapped,
sizeof( radeonTexObj ),
(destroy_texture_object_t *) radeonDestroyTexObj );
driSetTextureSwapCounterLocation( rmesa->texture_heaps[i],
& rmesa->c_textureSwaps );
}
rmesa->swtcl.RenderIndex = ~0;
rmesa->lost_context = 1;
/* Set the maximum texture size small enough that we can guarentee that
* all texture units can bind a maximal texture and have them both in
* texturable memory at once.
*/
ctx = rmesa->glCtx;
ctx->Const.MaxTextureUnits = 2;
driCalculateMaxTextureLevels( rmesa->texture_heaps,
rmesa->nr_heaps,
& ctx->Const,
4,
11, /* max 2D texture size is 2048x2048 */
0, /* 3D textures unsupported. */
0, /* cube textures unsupported. */
11, /* max rect texture size is 2048x2048. */
12,
GL_FALSE );
ctx->Const.MaxTextureMaxAnisotropy = 16.0;
/* No wide points.
*/
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSize = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 10.0;
ctx->Const.MaxLineWidthAA = 10.0;
ctx->Const.LineWidthGranularity = 0.0625;
/* Set maxlocksize (and hence vb size) small enough to avoid
* fallbacks in radeon_tcl.c. ie. guarentee that all vertices can
* fit in a single dma buffer for indexed rendering of quad strips,
* etc.
*/
ctx->Const.MaxArrayLockSize =
MIN2( ctx->Const.MaxArrayLockSize,
RADEON_BUFFER_SIZE / RADEON_MAX_TCL_VERTSIZE );
rmesa->boxes = (getenv("LIBGL_PERFORMANCE_BOXES") != NULL);
/* Initialize the software rasterizer and helper modules.
*/
_swrast_CreateContext( ctx );
_ac_CreateContext( ctx );
_tnl_CreateContext( ctx );
_swsetup_CreateContext( ctx );
_ae_create_context( ctx );
/* Install the customized pipeline:
*/
_tnl_destroy_pipeline( ctx );
_tnl_install_pipeline( ctx, radeon_pipeline );
ctx->Driver.FlushVertices = radeonFlushVertices;
/* Try and keep materials and vertices separate:
*/
_tnl_isolate_materials( ctx, GL_TRUE );
/* _mesa_allow_light_in_model( ctx, GL_FALSE ); */
/* Try and keep materials and vertices separate:
*/
_tnl_isolate_materials( ctx, GL_TRUE );
/* Configure swrast to match hardware characteristics:
*/
_swrast_allow_pixel_fog( ctx, GL_FALSE );
_swrast_allow_vertex_fog( ctx, GL_TRUE );
_math_matrix_ctr( &rmesa->TexGenMatrix[0] );
_math_matrix_ctr( &rmesa->TexGenMatrix[1] );
_math_matrix_ctr( &rmesa->tmpmat );
_math_matrix_set_identity( &rmesa->TexGenMatrix[0] );
_math_matrix_set_identity( &rmesa->TexGenMatrix[1] );
_math_matrix_set_identity( &rmesa->tmpmat );
driInitExtensions( ctx, card_extensions, GL_TRUE );
if (rmesa->dri.drmMinor >= 9)
_mesa_enable_extension( ctx, "GL_NV_texture_rectangle");
radeonInitDriverFuncs( ctx );
radeonInitIoctlFuncs( ctx );
radeonInitStateFuncs( ctx );
radeonInitSpanFuncs( ctx );
radeonInitTextureFuncs( ctx );
radeonInitState( rmesa );
radeonInitSwtcl( ctx );
rmesa->iw.irq_seq = -1;
rmesa->irqsEmitted = 0;
rmesa->do_irqs = (rmesa->radeonScreen->irq && !getenv("RADEON_NO_IRQS"));
rmesa->do_usleeps = !getenv("RADEON_NO_USLEEPS");
rmesa->vblank_flags = (rmesa->radeonScreen->irq != 0)
? driGetDefaultVBlankFlags() : VBLANK_FLAG_NO_IRQ;
rmesa->get_ust = (PFNGLXGETUSTPROC) glXGetProcAddress( (const GLubyte *) "__glXGetUST" );
if ( rmesa->get_ust == NULL ) {
rmesa->get_ust = get_ust_nop;
}
(*rmesa->get_ust)( & rmesa->swap_ust );
#if DO_DEBUG
RADEON_DEBUG = driParseDebugString( getenv( "RADEON_DEBUG" ),
debug_control );
#endif
if (getenv("RADEON_NO_RAST")) {
fprintf(stderr, "disabling 3D acceleration\n");
FALLBACK(rmesa, RADEON_FALLBACK_DISABLE, 1);
}
else if (getenv("RADEON_TCL_FORCE_ENABLE")) {
fprintf(stderr, "Enabling TCL support... this will probably crash\n");
fprintf(stderr, " your card if it isn't capable of TCL!\n");
rmesa->radeonScreen->chipset |= RADEON_CHIPSET_TCL;
} else if (getenv("RADEON_TCL_FORCE_DISABLE") ||
!(rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL)) {
rmesa->radeonScreen->chipset &= ~RADEON_CHIPSET_TCL;
fprintf(stderr, "disabling TCL support\n");
TCL_FALLBACK(rmesa->glCtx, RADEON_TCL_FALLBACK_TCL_DISABLE, 1);
}
if (rmesa->radeonScreen->chipset & RADEON_CHIPSET_TCL) {
if (!getenv("RADEON_NO_VTXFMT"))
radeonVtxfmtInit( ctx );
_tnl_need_dlist_norm_lengths( ctx, GL_FALSE );
}
return GL_TRUE;
}
