static int dce_virtual_crtc_init(struct amdgpu_device *adev, int index)
{
struct amdgpu_crtc *amdgpu_crtc;
int i;
amdgpu_crtc = kzalloc(sizeof(struct amdgpu_crtc) +
(AMDGPUFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
if (amdgpu_crtc == NULL)
return -ENOMEM;
drm_crtc_init(adev->ddev, &amdgpu_crtc->base, &dce_virtual_crtc_funcs);
drm_mode_crtc_set_gamma_size(&amdgpu_crtc->base, 256);
amdgpu_crtc->crtc_id = index;
adev->mode_info.crtcs[index] = amdgpu_crtc;
for (i = 0; i < 256; i++) {
amdgpu_crtc->lut_r[i] = i << 2;
amdgpu_crtc->lut_g[i] = i << 2;
amdgpu_crtc->lut_b[i] = i << 2;
}
amdgpu_crtc->pll_id = ATOM_PPLL_INVALID;
amdgpu_crtc->encoder = NULL;
amdgpu_crtc->connector = NULL;
amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE;
drm_crtc_helper_add(&amdgpu_crtc->base, &dce_virtual_crtc_helper_funcs);
return 0;
}
/* CRTC setup */
static void cirrus_crtc_init(struct drm_device *dev)
{
struct cirrus_device *cdev = dev->dev_private;
struct cirrus_crtc *cirrus_crtc;
int i;
cirrus_crtc = kzalloc(sizeof(struct cirrus_crtc) +
(CIRRUSFB_CONN_LIMIT * sizeof(struct drm_connector *)),
GFP_KERNEL);
if (cirrus_crtc == NULL)
return;
drm_crtc_init(dev, &cirrus_crtc->base, &cirrus_crtc_funcs);
drm_mode_crtc_set_gamma_size(&cirrus_crtc->base, CIRRUS_LUT_SIZE);
cdev->mode_info.crtc = cirrus_crtc;
for (i = 0; i < CIRRUS_LUT_SIZE; i++) {
cirrus_crtc->lut_r[i] = i;
cirrus_crtc->lut_g[i] = i;
cirrus_crtc->lut_b[i] = i;
}
drm_crtc_helper_add(&cirrus_crtc->base, &cirrus_helper_funcs);
}
struct pl111_drm_crtc *pl111_crtc_create(struct drm_device *dev)
{
struct pl111_drm_crtc *pl111_crtc;
pl111_crtc = kzalloc(sizeof(struct pl111_drm_crtc), GFP_KERNEL);
if (pl111_crtc == NULL) {
pr_err("Failed to allocated pl111_drm_crtc\n");
return NULL;
}
drm_crtc_init(dev, &pl111_crtc->crtc, &crtc_funcs);
drm_crtc_helper_add(&pl111_crtc->crtc, &crtc_helper_funcs);
pl111_crtc->crtc_index = pl111_crtc_num;
pl111_crtc_num++;
pl111_crtc->crtc.enabled = 0;
pl111_crtc->last_bpp = 0;
pl111_crtc->current_update_res = NULL;
#ifdef CONFIG_DMA_SHARED_BUFFER_USES_KDS
pl111_crtc->displaying_fb = NULL;
pl111_crtc->old_kds_res_set = NULL;
spin_lock_init(&pl111_crtc->current_displaying_lock);
#endif
pl111_crtc->show_framebuffer_cb = show_framebuffer_on_crtc_cb_internal;
INIT_LIST_HEAD(&pl111_crtc->update_queue);
spin_lock_init(&pl111_crtc->base_update_lock);
return pl111_crtc;
}
struct drm_crtc *omap_crtc_init(struct drm_device *dev,
struct omap_overlay *ovl, int id)
{
struct drm_crtc *crtc = NULL;
struct omap_crtc *omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
DBG("%s", ovl->name);
if (!omap_crtc) {
dev_err(dev->dev, "could not allocate CRTC\n");
goto fail;
}
crtc = &omap_crtc->base;
omap_crtc->plane = omap_plane_init(dev, ovl, (1 << id), true);
omap_crtc->plane->crtc = crtc;
omap_crtc->name = ovl->name;
omap_crtc->id = id;
drm_crtc_init(dev, crtc, &omap_crtc_funcs);
drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
return crtc;
fail:
if (crtc) {
omap_crtc_destroy(crtc);
}
return NULL;
}
int vigs_crtc_init(struct vigs_device *vigs_dev)
{
struct vigs_crtc *vigs_crtc;
int ret;
DRM_DEBUG_KMS("enter\n");
vigs_crtc = kzalloc(sizeof(*vigs_crtc), GFP_KERNEL);
if (!vigs_crtc) {
return -ENOMEM;
}
ret = drm_crtc_init(vigs_dev->drm_dev,
&vigs_crtc->base,
&vigs_crtc_funcs);
if (ret != 0) {
kfree(vigs_crtc);
return ret;
}
drm_crtc_helper_add(&vigs_crtc->base, &vigs_crtc_helper_funcs);
return 0;
}
static void bochs_crtc_init(struct drm_device *dev)
{
struct bochs_device *bochs = dev->dev_private;
struct drm_crtc *crtc = &bochs->crtc;
drm_crtc_init(dev, crtc, &bochs_crtc_funcs);
drm_crtc_helper_add(crtc, &bochs_helper_funcs);
}
static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
{
struct vmw_screen_object_unit *sou;
struct drm_device *dev = dev_priv->dev;
struct drm_connector *connector;
struct drm_encoder *encoder;
struct drm_crtc *crtc;
sou = kzalloc(sizeof(*sou), GFP_KERNEL);
if (!sou)
return -ENOMEM;
sou->base.unit = unit;
crtc = &sou->base.crtc;
encoder = &sou->base.encoder;
connector = &sou->base.connector;
sou->base.active_implicit = false;
sou->base.pref_active = (unit == 0);
sou->base.pref_width = dev_priv->initial_width;
sou->base.pref_height = dev_priv->initial_height;
sou->base.pref_mode = NULL;
sou->base.is_implicit = false;
drm_connector_init(dev, connector, &vmw_sou_connector_funcs,
DRM_MODE_CONNECTOR_VIRTUAL);
connector->status = vmw_du_connector_detect(connector, true);
drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
DRM_MODE_ENCODER_VIRTUAL, NULL);
drm_mode_connector_attach_encoder(connector, encoder);
encoder->possible_crtcs = (1 << unit);
encoder->possible_clones = 0;
(void) drm_connector_register(connector);
drm_crtc_init(dev, crtc, &vmw_screen_object_crtc_funcs);
drm_mode_crtc_set_gamma_size(crtc, 256);
drm_object_attach_property(&connector->base,
dev->mode_config.dirty_info_property,
1);
drm_object_attach_property(&connector->base,
dev_priv->hotplug_mode_update_property, 1);
drm_object_attach_property(&connector->base,
dev->mode_config.suggested_x_property, 0);
drm_object_attach_property(&connector->base,
dev->mode_config.suggested_y_property, 0);
if (dev_priv->implicit_placement_property)
drm_object_attach_property
(&connector->base,
dev_priv->implicit_placement_property,
sou->base.is_implicit);
return 0;
}
/* initialize crtc */
struct drm_crtc *mdp4_crtc_init(struct drm_device *dev,
struct drm_plane *plane, int id, int ovlp_id,
enum mdp4_dma dma_id)
{
struct drm_crtc *crtc = NULL;
struct mdp4_crtc *mdp4_crtc;
int ret;
mdp4_crtc = kzalloc(sizeof(*mdp4_crtc), GFP_KERNEL);
if (!mdp4_crtc) {
ret = -ENOMEM;
goto fail;
}
crtc = &mdp4_crtc->base;
mdp4_crtc->plane = plane;
mdp4_crtc->ovlp = ovlp_id;
mdp4_crtc->dma = dma_id;
mdp4_crtc->vblank.irqmask = dma2irq(mdp4_crtc->dma);
mdp4_crtc->vblank.irq = mdp4_crtc_vblank_irq;
mdp4_crtc->err.irqmask = dma2err(mdp4_crtc->dma);
mdp4_crtc->err.irq = mdp4_crtc_err_irq;
snprintf(mdp4_crtc->name, sizeof(mdp4_crtc->name), "%s:%d",
dma_names[dma_id], ovlp_id);
spin_lock_init(&mdp4_crtc->cursor.lock);
ret = drm_flip_work_init(&mdp4_crtc->unref_fb_work, 16,
"unref fb", unref_fb_worker);
if (ret)
goto fail;
ret = drm_flip_work_init(&mdp4_crtc->unref_cursor_work, 64,
"unref cursor", unref_cursor_worker);
INIT_FENCE_CB(&mdp4_crtc->pageflip_cb, pageflip_cb);
drm_crtc_init(dev, crtc, &mdp4_crtc_funcs);
drm_crtc_helper_add(crtc, &mdp4_crtc_helper_funcs);
mdp4_plane_install_properties(mdp4_crtc->plane, &crtc->base);
return crtc;
fail:
if (crtc)
mdp4_crtc_destroy(crtc);
return ERR_PTR(ret);
}
static int qdev_crtc_init(struct drm_device *dev, int crtc_id)
{
struct qxl_crtc *qxl_crtc;
qxl_crtc = kzalloc(sizeof(struct qxl_crtc), GFP_KERNEL);
if (!qxl_crtc)
return -ENOMEM;
drm_crtc_init(dev, &qxl_crtc->base, &qxl_crtc_funcs);
qxl_crtc->index = crtc_id;
drm_mode_crtc_set_gamma_size(&qxl_crtc->base, 256);
drm_crtc_helper_add(&qxl_crtc->base, &qxl_crtc_helper_funcs);
return 0;
}
int shmob_drm_crtc_create(struct shmob_drm_device *sdev)
{
struct drm_crtc *crtc = &sdev->crtc.crtc;
int ret;
sdev->crtc.dpms = DRM_MODE_DPMS_OFF;
ret = drm_crtc_init(sdev->ddev, crtc, &crtc_funcs);
if (ret < 0)
return ret;
drm_crtc_helper_add(crtc, &crtc_helper_funcs);
return 0;
}
int vbox_crtc_init(struct drm_device *pDev, unsigned i)
{
struct vbox_crtc *pCrtc;
LogFunc(("vboxvideo: %d\n", __LINE__));
pCrtc = kzalloc(sizeof(struct vbox_crtc), GFP_KERNEL);
if (!pCrtc)
return -ENOMEM;
pCrtc->crtc_id = i;
drm_crtc_init(pDev, &pCrtc->base, &vbox_crtc_funcs);
drm_mode_crtc_set_gamma_size(&pCrtc->base, 256);
drm_crtc_helper_add(&pCrtc->base, &vbox_crtc_helper_funcs);
LogFunc(("vboxvideo: %d: pCrtc=%p\n", __LINE__, pCrtc));
return 0;
}
static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
{
struct vmw_screen_object_unit *sou;
struct drm_device *dev = dev_priv->dev;
struct drm_connector *connector;
struct drm_encoder *encoder;
struct drm_crtc *crtc;
sou = kzalloc(sizeof(*sou), GFP_KERNEL);
if (!sou)
return -ENOMEM;
sou->base.unit = unit;
crtc = &sou->base.crtc;
encoder = &sou->base.encoder;
connector = &sou->base.connector;
sou->active_implicit = false;
sou->base.pref_active = (unit == 0);
sou->base.pref_width = 800;
sou->base.pref_height = 600;
sou->base.pref_mode = NULL;
sou->base.is_implicit = true;
drm_connector_init(dev, connector, &vmw_legacy_connector_funcs,
DRM_MODE_CONNECTOR_VIRTUAL);
connector->status = vmw_du_connector_detect(connector, true);
drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
DRM_MODE_ENCODER_VIRTUAL);
drm_mode_connector_attach_encoder(connector, encoder);
encoder->possible_crtcs = (1 << unit);
encoder->possible_clones = 0;
drm_crtc_init(dev, crtc, &vmw_screen_object_crtc_funcs);
drm_mode_crtc_set_gamma_size(crtc, 256);
drm_connector_attach_property(connector,
dev->mode_config.dirty_info_property,
1);
return 0;
}
void vboxvideo_crtc_init(struct drm_device *dev, int index)
{
struct vboxvideo_device *gdev = dev->dev_private;
struct vboxvideo_crtc *vboxvideo_crtc;
int i;
vboxvideo_crtc = kzalloc( sizeof(struct vboxvideo_crtc)
+ (VBOXVIDEOFB_CONN_LIMIT
* sizeof(struct drm_connector *)),
GFP_KERNEL);
if (vboxvideo_crtc == NULL)
return;
drm_crtc_init(dev, &vboxvideo_crtc->base, &vboxvideo_crtc_funcs);
vboxvideo_crtc->crtc_id = index;
vboxvideo_crtc->last_dpms = VBOXVIDEO_DPMS_CLEARED;
gdev->mode_info.crtcs[index] = vboxvideo_crtc;
drm_crtc_helper_add(&vboxvideo_crtc->base, &vboxvideo_helper_funcs);
}
int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
{
static const unsigned int mmio_offsets[] = {
DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET
};
struct rcar_du_device *rcdu = rgrp->dev;
struct platform_device *pdev = to_platform_device(rcdu->dev);
struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];
struct drm_crtc *crtc = &rcrtc->crtc;
unsigned int irqflags;
char clk_name[5];
char *name;
int irq;
int ret;
/* Get the CRTC clock. */
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {
sprintf(clk_name, "du.%u", index);
name = clk_name;
} else {
name = NULL;
}
rcrtc->clock = devm_clk_get(rcdu->dev, name);
if (IS_ERR(rcrtc->clock)) {
dev_err(rcdu->dev, "no clock for CRTC %u\n", index);
return PTR_ERR(rcrtc->clock);
}
rcrtc->group = rgrp;
rcrtc->mmio_offset = mmio_offsets[index];
rcrtc->index = index;
rcrtc->dpms = DRM_MODE_DPMS_OFF;
rcrtc->plane = &rgrp->planes.planes[index % 2];
rcrtc->lvds_ch = -1;
rcrtc->plane->crtc = crtc;
rcrtc->plane->fb_plane = true;
ret = drm_crtc_init(rcdu->ddev, crtc, &crtc_funcs);
if (ret < 0)
return ret;
rcdu->crtcs_connect_id[index] = rcrtc->plane->crtc->base.id;
drm_crtc_helper_add(crtc, &crtc_helper_funcs);
/* Register the interrupt handler. */
if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {
irq = platform_get_irq(pdev, index);
irqflags = 0;
} else {
irq = platform_get_irq(pdev, 0);
irqflags = IRQF_SHARED;
}
if (irq < 0) {
dev_err(rcdu->dev, "no IRQ for CRTC %u\n", index);
return ret;
}
rcdu->ddev->irq_enabled = true;
ret = devm_request_irq(rcdu->dev, irq, rcar_du_crtc_irq, irqflags,
dev_name(rcdu->dev), rcrtc);
if (ret < 0) {
dev_err(rcdu->dev,
"failed to register IRQ for CRTC %u\n", index);
return ret;
}
return 0;
}
/* create crtc */
struct drm_crtc *xilinx_drm_crtc_create(struct drm_device *drm)
{
struct xilinx_drm_crtc *crtc;
struct device_node *sub_node;
int possible_crtcs = 1;
int ret;
crtc = devm_kzalloc(drm->dev, sizeof(*crtc), GFP_KERNEL);
if (!crtc)
return ERR_PTR(-ENOMEM);
/* probe chroma resampler and enable */
sub_node = of_parse_phandle(drm->dev->of_node, "cresample", 0);
if (sub_node) {
crtc->cresample = xilinx_cresample_probe(drm->dev, sub_node);
of_node_put(sub_node);
if (IS_ERR(crtc->cresample)) {
DRM_ERROR("failed to probe a cresample\n");
return ERR_CAST(crtc->cresample);
}
}
/* probe color space converter and enable */
sub_node = of_parse_phandle(drm->dev->of_node, "rgb2yuv", 0);
if (sub_node) {
crtc->rgb2yuv = xilinx_rgb2yuv_probe(drm->dev, sub_node);
of_node_put(sub_node);
if (IS_ERR(crtc->rgb2yuv)) {
DRM_ERROR("failed to probe a rgb2yuv\n");
return ERR_CAST(crtc->rgb2yuv);
}
}
/* probe a plane manager */
crtc->plane_manager = xilinx_drm_plane_probe_manager(drm);
if (IS_ERR(crtc->plane_manager)) {
DRM_ERROR("failed to probe a plane manager\n");
return ERR_CAST(crtc->plane_manager);
}
/* create a private plane. there's only one crtc now */
crtc->priv_plane = xilinx_drm_plane_create_private(crtc->plane_manager,
possible_crtcs);
if (IS_ERR(crtc->priv_plane)) {
DRM_ERROR("failed to create a private plane for crtc\n");
ret = PTR_ERR(crtc->priv_plane);
goto err_plane;
}
/* create extra planes */
xilinx_drm_plane_create_planes(crtc->plane_manager, possible_crtcs);
crtc->pixel_clock = devm_clk_get(drm->dev, NULL);
if (IS_ERR(crtc->pixel_clock)) {
DRM_DEBUG_KMS("failed to get pixel clock\n");
ret = -EPROBE_DEFER;
goto err_out;
}
ret = clk_prepare_enable(crtc->pixel_clock);
if (ret) {
DRM_DEBUG_KMS("failed to prepare/enable clock\n");
goto err_out;
}
sub_node = of_parse_phandle(drm->dev->of_node, "vtc", 0);
if (!sub_node) {
DRM_ERROR("failed to get a video timing controller node\n");
ret = -ENODEV;
goto err_out;
}
crtc->vtc = xilinx_vtc_probe(drm->dev, sub_node);
of_node_put(sub_node);
if (IS_ERR(crtc->vtc)) {
DRM_ERROR("failed to probe video timing controller\n");
ret = PTR_ERR(crtc->vtc);
goto err_out;
}
crtc->dpms = DRM_MODE_DPMS_OFF;
/* initialize drm crtc */
ret = drm_crtc_init(drm, &crtc->base, &xilinx_drm_crtc_funcs);
if (ret) {
DRM_ERROR("failed to initialize crtc\n");
goto err_out;
}
drm_crtc_helper_add(&crtc->base, &xilinx_drm_crtc_helper_funcs);
xilinx_drm_crtc_attach_property(&crtc->base);
return &crtc->base;
err_out:
xilinx_drm_plane_destroy_planes(crtc->plane_manager);
xilinx_drm_plane_destroy_private(crtc->plane_manager, crtc->priv_plane);
err_plane:
xilinx_drm_plane_remove_manager(crtc->plane_manager);
return ERR_PTR(ret);
}