static void hns_gmac_port_mode_get(void *mac_drv, struct hns_gmac_port_mode_cfg *port_mode) { u32 tx_ctrl; u32 recv_ctrl; struct mac_driver *drv = (struct mac_driver *)mac_drv; port_mode->port_mode = (enum hns_port_mode)dsaf_get_dev_field( drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S); tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG); recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG); port_mode->max_frm_size = dsaf_get_dev_field(drv, GMAC_MAX_FRM_SIZE_REG, GMAC_MAX_FRM_SIZE_M, GMAC_MAX_FRM_SIZE_S); port_mode->short_runts_thr = dsaf_get_dev_field(drv, GMAC_SHORT_RUNTS_THR_REG, GMAC_SHORT_RUNTS_THR_M, GMAC_SHORT_RUNTS_THR_S); port_mode->pad_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_PAD_EN_B); port_mode->crc_add = dsaf_get_bit(tx_ctrl, GMAC_TX_CRC_ADD_B); port_mode->an_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_AN_EN_B); port_mode->runt_pkt_en = dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_RUNT_PKT_EN_B); port_mode->strip_pad_en = dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_STRIP_PAD_EN_B); }
/** *hns_xgmac_get_pausefrm_cfg - get xgmac pause param *@mac_drv: mac driver *@rx_en:xgmac rx pause enable *@tx_en:xgmac tx pause enable */ static void hns_xgmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_en, u32 *tx_en) { struct mac_driver *drv = (struct mac_driver *)mac_drv; u32 pause_ctrl; pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); *rx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B); *tx_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B); }
/** *hns_gmac_get_en - get port enable *@mac_drv:mac device *@rx:rx enable *@tx:tx enable */ static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx) { struct mac_driver *drv = (struct mac_driver *)mac_drv; u32 porten; porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG); *tx = dsaf_get_bit(porten, GMAC_PORT_TX_EN_B); *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B); }
static void hns_gmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_pause_en, u32 *tx_pause_en) { u32 pause_en; struct mac_driver *drv = (struct mac_driver *)mac_drv; pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG); *rx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B); *tx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B); }
/** *hns_xgmac_get_info - get xgmac information *@mac_drv: mac driver *@mac_info:mac information */ static void hns_xgmac_get_info(void *mac_drv, struct mac_info *mac_info) { struct mac_driver *drv = (struct mac_driver *)mac_drv; u32 pause_time, pause_ctrl, port_mode, ctrl_val; ctrl_val = dsaf_read_dev(drv, XGMAC_MAC_CONTROL_REG); mac_info->pad_and_crc_en = dsaf_get_bit(ctrl_val, XGMAC_CTL_TX_PAD_B); mac_info->auto_neg = 0; pause_time = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_TIME_REG); mac_info->tx_pause_time = pause_time; port_mode = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); mac_info->port_en = dsaf_get_field(port_mode, XGMAC_PORT_MODE_TX_M, XGMAC_PORT_MODE_TX_S) && dsaf_get_field(port_mode, XGMAC_PORT_MODE_RX_M, XGMAC_PORT_MODE_RX_S); mac_info->duplex = 1; mac_info->speed = MAC_SPEED_10000; pause_ctrl = dsaf_read_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG); mac_info->rx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_RX_B); mac_info->tx_pause_en = dsaf_get_bit(pause_ctrl, XGMAC_PAUSE_CTL_TX_B); }
static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr) { struct mac_driver *drv = (struct mac_driver *)mac_drv; u32 high_val = mac_addr[1] | (mac_addr[0] << 8); u32 low_val = mac_addr[5] | (mac_addr[4] << 8) | (mac_addr[3] << 16) | (mac_addr[2] << 24); u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG); u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B); dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val); dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG, high_val | (sta_addr_en << GMAC_ADDR_EN_B)); }