static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static void dpi_display_disable(struct omap_dss_device *dssdev)
{
if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(dssdev);
dssdev->driver->disable(dssdev);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
omap_dss_stop_device(dssdev);
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
if (dpi_use_dsi_pll(dssdev)) {
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit(dpi.dsidev, true);
dsi_runtime_put(dpi.dsidev);
}
dispc_runtime_put();
dss_runtime_put();
#ifdef CONFIG_FB_OMAP_BOOTLOADER_INIT
if (dpi.fb_skip) {
dssdev->dss_clks_disable();
dpi.fb_skip = false;
}
#endif
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
if (dssdev->manager)
dssdev->manager->disable(dssdev->manager);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
{
enum omap_dsi_index ix;
ix = (dssdev->channel == OMAP_DSS_CHANNEL_LCD) ? DSI1 : DSI2;
dss_select_dispc_clk_source(ix, DSS_SRC_DSS1_ALWON_FCLK);
dsi_pll_uninit(ix);
}
#endif
/* cut clock(s) */
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
if (!cpu_is_omap44xx())
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dss_mainclk_state_disable(true);
if (cpu_is_omap34xx() && !cpu_is_omap3630())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
static int dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
r = -EINVAL;
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
r = dsi_pll_init(1, 1);
if (r)
goto err3;
#endif
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dispc_enable_lcd_out(1);
r = dssdev->driver->enable(dssdev);
if (r)
goto err5;
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err5:
dispc_enable_lcd_out(0);
err4:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err3:
dss_clk_disable(DSS_CLK_FCK2);
#endif
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
if (dpi_use_dsi_pll(dssdev)) {
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dpi.dsidev, 0, 1);
if (r)
goto err3;
}
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dssdev->manager->enable(dssdev->manager);
return 0;
err4:
if (dpi_use_dsi_pll(dssdev))
dsi_pll_uninit(dpi.dsidev, true);
err3:
if (dpi_use_dsi_pll(dssdev))
dss_clk_disable(DSS_CLK_SYSCK);
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_SYSCK);
r = dsi_pll_init(dssdev, 0, 1);
if (r)
goto err3;
#endif
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
dssdev->manager->enable(dssdev->manager);
return 0;
err4:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err3:
dss_clk_disable(DSS_CLK_SYSCK);
#endif
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
static int dpi_display_enable(struct omap_display *display)
{
struct omap_panel *panel = display->panel;
int r;
if (display->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
return -EINVAL;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(display);
if (r)
goto err0;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
r = dsi_pll_init(0, 1);
if (r)
goto err1;
#endif
r = dpi_set_mode(display);
if (r)
goto err2;
mdelay(2);
dispc_enable_lcd_out(1);
r = panel->enable(display);
if (r)
goto err3;
display->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err3:
dispc_enable_lcd_out(0);
err2:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit();
err1:
dss_clk_disable(DSS_CLK_FCK2);
#endif
err0:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
static int dpi_display_resume(struct omap_dss_device *dssdev)
{
int r = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
DSSDBG("dpi_display_resume\n");
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
r = dsi_pll_init(1, 1);
if (r)
goto err0;
r = dpi_set_mode(dssdev);
if (r)
goto err0;
#endif
dispc_enable_lcd_out(1);
if (dssdev->driver->resume) {
r = dssdev->driver->resume(dssdev);
if (r)
goto err1;
}
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return 0;
err1:
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
err0:
DSSERR("<%s!!> err0: failed to init DSI_PLL = %d\n", __func__, r);
dss_select_clk_source(0, 0);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
enable_vpll2_power(0);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_dispc_clk_source(DSS_CLK_SRC_FCK);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_SYSCK);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
{
dssdev->manager->disable(dssdev->manager);
if (dpi_use_dsi_pll(dssdev)) {
dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit(dpi.dsidev, true);
dss_clk_disable(DSS_CLK_SYSCK);
}
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
omap_dss_stop_device(dssdev);
}
static int dpi_display_resume(struct omap_dss_device *dssdev)
{
int r = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
DSSDBG("dpi_display_resume\n");
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_clk_enable(DSS_CLK_FCK2);
r = dsi_pll_init(dssdev, 1, 1);
if (r) {
DSSERR("failed in dsi_pll_init\n");
goto err1;
}
r = dpi_set_mode(dssdev);
if (r) {
DSSERR("failed in dpi_set_mode\n");
goto err2;
}
mdelay(2);
#endif
dispc_enable_lcd_out(1);
if (dssdev->driver->resume)
dssdev->driver->resume(dssdev);
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
return r;
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
err2:
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
err1:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
#endif
}
static void dpi_display_disable(struct omap_dss_device *dssdev)
{
int lcd_channel_ix = 0;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
lcd_channel_ix = 1;
if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(dssdev);
dssdev->driver->disable(dssdev);
if (use_dsi_for_hdmi) {
dss_select_clk_source(0, 0);
dispc_go(OMAP_DSS_CHANNEL_LCD);
while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
;
dsi_pll_uninit(lcd_channel_ix);
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
omap_dss_stop_device(dssdev);
}
static int dpi_verify_dsi_pll(struct platform_device *dsidev)
{
int r;
/* do initial setup with the PLL to see if it is operational */
r = dsi_runtime_get(dsidev);
if (r)
return r;
r = dsi_pll_init(dsidev, 0, 1);
if (r) {
dsi_runtime_put(dsidev);
return r;
}
dsi_pll_uninit(dsidev, true);
dsi_runtime_put(dsidev);
return 0;
}
static void dpi_display_disable(struct omap_dss_device *dssdev)
{
struct omap_overlay_manager *mgr = dpi.output.manager;
mutex_lock(&dpi.lock);
dss_mgr_disable(mgr);
if (dpi.dsidev) {
dss_select_lcd_clk_source(mgr->id, OMAP_DSS_CLK_SRC_FCK);
dsi_pll_uninit(dpi.dsidev, true);
dsi_runtime_put(dpi.dsidev);
}
dispc_runtime_put();
if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
regulator_disable(dpi.vdds_dsi_reg);
mutex_unlock(&dpi.lock);
}
static void dpi_display_disable(struct omap_display *display)
{
if (display->state == OMAP_DSS_DISPLAY_DISABLED)
return;
if (display->state == OMAP_DSS_DISPLAY_SUSPENDED)
dpi_display_resume(display);
display->panel->disable(display);
dispc_enable_lcd_out(0);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dss_select_clk_source(0, 0);
dsi_pll_uninit();
dss_clk_disable(DSS_CLK_FCK2);
#endif
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
display->state = OMAP_DSS_DISPLAY_DISABLED;
}
static int dpi_display_suspend(struct omap_dss_device *dssdev)
{
int use_dsi_for_hdmi = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
return -EINVAL;
DSSDBG("dpi_display_suspend\n");
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->driver->suspend)
dssdev->driver->suspend(dssdev);
if (use_dsi_for_hdmi) {
dss_select_clk_source(0, 0);
dispc_go(OMAP_DSS_CHANNEL_LCD);
while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
;
dsi_pll_uninit(dsi1);
enable_vpll2_power(0);
dss_clk_disable(DSS_CLK_FCK2);
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
return 0;
}
static int dpi_set_mode(struct omap_dss_device *dssdev)
{
struct omap_video_timings *t = &dssdev->panel.timings;
int lck_div = 0, pck_div = 0;
unsigned long fck = 0;
unsigned long pck = 0;
bool is_tft;
int r = 0, lcd_channel_ix = 0;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
lcd_channel_ix = 1;
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_set_pol_freq(OMAP_DSS_CHANNEL_LCD2, dssdev->panel.config,
dssdev->panel.acbi, dssdev->panel.acb);
else
dispc_set_pol_freq(OMAP_DSS_CHANNEL_LCD, dssdev->panel.config,
dssdev->panel.acbi, dssdev->panel.acb);
is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
if (use_dsi_for_hdmi)
r = dpi_set_dsi_clk(lcd_channel_ix, is_tft,
t->pixel_clock * 1000,
&fck, &lck_div, &pck_div);
else
r = dpi_set_dispc_clk(lcd_channel_ix, is_tft,
t->pixel_clock * 1000,
&fck, &lck_div, &pck_div);
if (r)
goto err0;
if (!cpu_is_omap44xx())
pck = fck / lck_div / pck_div / 1000;
else
pck = 0;
if (pck != t->pixel_clock) {
DSSWARN("Could not find exact pixel clock. "
"Requested %d kHz, got %lu kHz\n",
t->pixel_clock, pck);
t->pixel_clock = pck;
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_set_lcd_timings(OMAP_DSS_CHANNEL_LCD2, t);
else
dispc_set_lcd_timings(OMAP_DSS_CHANNEL_LCD, t);
err0:
if (cpu_is_omap44xx() && use_dsi_for_hdmi) {
dss_select_clk_source_dsi(lcd_channel_ix, false, false);
dsi_pll_uninit(lcd_channel_ix);
}
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
static int dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
int lcd_channel_ix = 1;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) {
DSSINFO("Lcd channel index 1");
dpi2_base = ioremap(DPI2_BASE, 2000);
lcd_channel_ix = 1;
} else
lcd_channel_ix = 0;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err0;
}
if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
DSSERR("display already enabled\n");
r = -EINVAL;
goto err1;
}
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
r = dpi_basic_init(dssdev);
if (r)
goto err2;
if (use_dsi_for_hdmi) {
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
if (cpu_is_omap3630())
r = dsi_pll_init(lcd_channel_ix, dssdev, 1, 1);
else
/*check param 2*/
r = dsi_pll_init(lcd_channel_ix, dssdev, 0, 1);
if (r)
goto err3;
}
r = dpi_set_mode(dssdev);
if (r)
goto err4;
mdelay(2);
if (cpu_is_omap44xx())
dpi_start_auto_update(dssdev);
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 1);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1);
r = dssdev->driver->enable(dssdev);
if (r)
goto err5;
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
/* This is done specifically for HDMI panel
* Default HDMI panel timings may not work for all monitors
* Reset HDMI panel timings after enabling HDMI.
*/
if (use_dsi_for_hdmi)
dpi_set_timings(dssdev, &dssdev->panel.timings);
return 0;
err5:
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
err4:
if (use_dsi_for_hdmi) {
dsi_pll_uninit(lcd_channel_ix);
enable_vpll2_power(0);
err3:
dss_clk_disable(DSS_CLK_FCK2);
}
err2:
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
err1:
omap_dss_stop_device(dssdev);
err0:
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
if (cpu_is_omap44xx() && dssdev->channel != OMAP_DSS_CHANNEL_LCD2) {
/* Only LCD2 channel is connected to DPI on OMAP4 */
return -EINVAL;
}
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
return r;
}
if (cpu_is_omap34xx() && !cpu_is_omap3630()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err0;
}
/* turn on clock(s) */
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
if (!cpu_is_omap44xx())
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
/*Should need only FCK2 (38.4MHz)*/
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2);
#endif
dss_mainclk_state_enable();
dpi_basic_init(dssdev);
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
if (!cpu_is_omap44xx())
r = dsi_pll_init(dssdev, 0, 1);
else {
r = dsi_pll_init(dssdev, 1, 1);
}
if (r)
goto err1;
#endif /* CONFIG_OMAP2_DSS_USE_DSI_PLL */
r = dpi_set_mode(dssdev);
if (r)
goto err2;
mdelay(2);
if (dssdev->manager) {
if (cpu_is_omap44xx())
dpi_start_auto_update(dssdev);
dssdev->manager->enable(dssdev->manager);
}
return 0;
err2:
#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
dsi_pll_uninit(dssdev->channel == OMAP_DSS_CHANNEL_LCD ? DSI1 : DSI2);
err1:
#endif
dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
if (!cpu_is_omap44xx())
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
dss_mainclk_state_disable(true);
if (cpu_is_omap34xx() && !cpu_is_omap3630())
regulator_disable(dpi.vdds_dsi_reg);
err0:
omap_dss_stop_device(dssdev);
return r;
}
static int dpi_display_enable(struct omap_dss_device *dssdev)
{
struct omap_dss_device *out = &dpi.output;
int r;
mutex_lock(&dpi.lock);
if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI) && !dpi.vdds_dsi_reg) {
DSSERR("no VDSS_DSI regulator\n");
r = -ENODEV;
goto err_no_reg;
}
if (out == NULL || out->manager == NULL) {
DSSERR("failed to enable display: no output/manager\n");
r = -ENODEV;
goto err_no_out_mgr;
}
if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI)) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err_reg_enable;
}
r = dispc_runtime_get();
if (r)
goto err_get_dispc;
r = dss_dpi_select_source(out->manager->id);
if (r)
goto err_src_sel;
if (dpi.dsidev) {
r = dsi_runtime_get(dpi.dsidev);
if (r)
goto err_get_dsi;
r = dsi_pll_init(dpi.dsidev, 0, 1);
if (r)
goto err_dsi_pll_init;
}
r = dpi_set_mode(out->manager);
if (r)
goto err_set_mode;
dpi_config_lcd_manager(out->manager);
mdelay(2);
r = dss_mgr_enable(out->manager);
if (r)
goto err_mgr_enable;
mutex_unlock(&dpi.lock);
return 0;
err_mgr_enable:
err_set_mode:
if (dpi.dsidev)
dsi_pll_uninit(dpi.dsidev, true);
err_dsi_pll_init:
if (dpi.dsidev)
dsi_runtime_put(dpi.dsidev);
err_get_dsi:
err_src_sel:
dispc_runtime_put();
err_get_dispc:
if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI))
regulator_disable(dpi.vdds_dsi_reg);
err_reg_enable:
err_no_out_mgr:
err_no_reg:
mutex_unlock(&dpi.lock);
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err_start_dev;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err_reg_enable;
}
r = dss_runtime_get();
if (r)
goto err_get_dss;
if (!dssdev->skip_init) {
r = dispc_runtime_get();
if (r)
goto err_get_dispc;
}
dpi_basic_init(dssdev);
if (dpi_use_dsi_pll(dssdev)) {
r = dsi_runtime_get(dpi.dsidev);
if (r)
goto err_get_dsi;
if (!dssdev->skip_init) {
r = dsi_pll_init(dpi.dsidev, 0, 1);
if (r)
goto err_dsi_pll_init;
}
}
r = dpi_set_mode(dssdev);
if (r)
goto err_set_mode;
mdelay(2);
dssdev->manager->enable(dssdev->manager);
if (dssdev->skip_init)
dssdev->skip_init = false;
return 0;
err_set_mode:
if (dpi_use_dsi_pll(dssdev))
dsi_pll_uninit(dpi.dsidev, true);
err_dsi_pll_init:
if (dpi_use_dsi_pll(dssdev))
dsi_runtime_put(dpi.dsidev);
err_get_dsi:
dispc_runtime_put();
err_get_dispc:
dss_runtime_put();
err_get_dss:
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err_reg_enable:
omap_dss_stop_device(dssdev);
err_start_dev:
return r;
}
int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
{
int r;
if (cpu_is_omap34xx() && !dpi.vdds_dsi_reg) {
DSSERR("no VDSS_DSI regulator\n");
return -ENODEV;
}
if (dssdev->manager == NULL) {
DSSERR("failed to enable display: no manager\n");
return -ENODEV;
}
r = omap_dss_start_device(dssdev);
if (r) {
DSSERR("failed to start device\n");
goto err_start_dev;
}
if (cpu_is_omap34xx()) {
r = regulator_enable(dpi.vdds_dsi_reg);
if (r)
goto err_reg_enable;
}
r = dispc_runtime_get();
if (r)
goto err_get_dispc;
dpi_basic_init(dssdev);
if (dpi_use_dsi_pll(dssdev)) {
r = dsi_runtime_get(dpi.dsidev);
if (r)
goto err_get_dsi;
r = dsi_pll_init(dpi.dsidev, 0, 1);
if (r)
goto err_dsi_pll_init;
}
r = dpi_set_mode(dssdev);
if (r)
goto err_set_mode;
mdelay(2);
r = dss_mgr_enable(dssdev->manager);
if (r)
goto err_mgr_enable;
return 0;
err_mgr_enable:
err_set_mode:
if (dpi_use_dsi_pll(dssdev))
dsi_pll_uninit(dpi.dsidev, true);
err_dsi_pll_init:
if (dpi_use_dsi_pll(dssdev))
dsi_runtime_put(dpi.dsidev);
err_get_dsi:
dispc_runtime_put();
err_get_dispc:
if (cpu_is_omap34xx())
regulator_disable(dpi.vdds_dsi_reg);
err_reg_enable:
omap_dss_stop_device(dssdev);
err_start_dev:
return r;
}
static int dpi_display_resume(struct omap_dss_device *dssdev)
{
int r = 0;
int lcd_channel_ix = 1;
int use_dsi_for_hdmi = 0;
if (strncmp("hdmi", dssdev->name, 4) == 0)
use_dsi_for_hdmi = 1;
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2) {
DSSINFO("Lcd channel index 1");
dpi2_base = ioremap(DPI2_BASE, 2000);
lcd_channel_ix = 1;
} else
lcd_channel_ix = 0;
if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
return -EINVAL;
DSSDBG("dpi_display_resume\n");
dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
if (use_dsi_for_hdmi) {
dss_clk_enable(DSS_CLK_FCK2);
enable_vpll2_power(1);
if (cpu_is_omap3630())
r = dsi_pll_init(lcd_channel_ix, dssdev, 1, 1);
else
r = dsi_pll_init(lcd_channel_ix, dssdev, 0, 1);
if (r)
goto err0;
r = dpi_set_mode(dssdev);
if (r)
goto err1;
}
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 1);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 1);
if (dssdev->driver->resume) {
r = dssdev->driver->resume(dssdev);
if (r)
goto err2;
}
dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
/* This is done specifically for HDMI panel
* Default HDMI panel timings may not work for all monitors
* Reset HDMI panel timings after enabling HDMI.
*/
if (use_dsi_for_hdmi)
dpi_set_timings(dssdev, &dssdev->panel.timings);
return 0;
err2:
if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD2, 0);
else
dispc_enable_lcd_out(OMAP_DSS_CHANNEL_LCD, 0);
if (use_dsi_for_hdmi) {
err1:
DSSERR("<%s!!> err0: failed to init DSI_PLL = %d\n",
__func__, r);
dss_select_clk_source(0, 0);
dispc_go(OMAP_DSS_CHANNEL_LCD);
while (dispc_go_busy(OMAP_DSS_CHANNEL_LCD))
;
dsi_pll_uninit(dsi1);
enable_vpll2_power(0);
err0:
dss_clk_disable(DSS_CLK_FCK2);
}
dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
return r;
}
