void dss_clk_enable(enum dss_clock clks) { dss_clk_enable_no_ctx(clks); if (cpu_is_omap34xx() && dss_need_ctx_restore()) restore_all_ctx(); }
static void dss_clk_enable_all_no_ctx(void) { enum dss_clock clks; clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M; if (cpu_is_omap34xx() || cpu_is_omap44xx()) clks |= DSS_CLK_96M; dss_clk_enable_no_ctx(clks); }
void dss_clk_enable(enum dss_clock clks) { bool check_ctx = core.num_clks_enabled == 0; dss_clk_enable_no_ctx(clks); if (check_ctx && cpu_is_omap34xx() && dss_need_ctx_restore()) restore_all_ctx(); }
void dss_clk_enable(enum dss_clock clks) { dss_clk_enable_no_ctx(clks); if (cpu_is_omap34xx()) { unsigned num_clks = count_clk_bits(clks); if (dss.num_clks_enabled == num_clks) restore_all_ctx(); } }
static void dss_clk_enable_all_no_ctx(void) #endif // == 2011.05.31 === [email protected] END { enum dss_clock clks; clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M; if (cpu_is_omap34xx()) clks |= DSS_CLK_96M; dss_clk_enable_no_ctx(clks); }
void dss_clk_enable(enum dss_clock clks) { bool restore = false; if (core.num_clks_enabled == 0) restore = true; dss_clk_enable_no_ctx(clks); if (restore || (cpu_is_omap34xx() && dss_need_ctx_restore())) restore_all_ctx(); }
static void save_all_ctx(void) { DSSDBG("save context\n"); dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1); dss_save_context(); dispc_save_context(); #ifdef CONFIG_OMAP2_DSS_DSI dsi_save_context(); #endif dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1); }
static int omap_dss_resume(struct platform_device *pdev) { DSSDBG("resume\n"); omap_pm_set_min_bus_tput(&core.pdev->dev, OCP_INITIATOR_AGENT, 166 * 1000 * 4); /* * FCLKs in CM_FCLKEN_DSS restored */ dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_54M); #if defined(CONFIG_MACH_SAMSUNG_NOWPLUS) dss_set_mainclk_state(true); #endif return dss_resume_all_devices(); }
void dss_clk_enable(enum dss_clock clks) { dss_clk_enable_no_ctx(clks); }