// SPI i/f to EEPROM (4Mb)
// Peripheral ID 21 (0x00200000)
// Connections:
// SS PA11 (peripheral A)
// MISO PA12 (peripheral A)
// MOSI PA13 (peripheral A)
// SCK PA14 (peripheral A)
// Set clock to 3 MHz, AT25 device is rated to 70MHz, 18MHz would be better
void eepromInit()
{
register Spi *spiptr ;
register uint32_t timer ;
PMC->PMC_PCER0 |= 0x00200000L ; // Enable peripheral clock to SPI
/* Configure PIO */
configure_pins( 0x00007800, PIN_PERIPHERAL | PIN_INPUT | PIN_PER_A | PIN_PORTA | PIN_NO_PULLUP ) ;
spiptr = SPI ;
timer = ( Master_frequency / 3000000 ) << 8 ; // Baud rate 3Mb/s
spiptr->SPI_MR = 0x14000011 ; // 0001 0100 0000 0000 0000 0000 0001 0001 Master
spiptr->SPI_CSR[0] = 0x01180009 | timer ; // 0000 0001 0001 1000 xxxx xxxx 0000 1001
NVIC_EnableIRQ(SPI_IRQn) ;
eepromWriteEnable();
eepromWriteStatusRegister();
}
void eepromWrite(uint32_t address, uint8_t * buffer, uint32_t size, bool blocking=true)
{
// TRACE("eepromWrite(%d, %p, %d)", address, buffer, size);
#if defined(SIMU)
assert(size);
eeprom_pointer = address;
eeprom_buffer_data = buffer;
eeprom_buffer_size = size+1;
eeprom_read_operation = false;
Spi_complete = false;
sem_post(eeprom_write_sem);
#else
eepromWriteEnable();
eepromByteProgram(address, buffer, size);
#endif
if (blocking) {
eepromWaitSpiComplete();
eepromWaitReadStatus();
}
}
void eepromEraseBlock(uint32_t address, bool blocking=true)
{
// TRACE("eepromEraseBlock(%d)", address);
#if defined(SIMU)
static uint8_t erasedBlock[EEPROM_BLOCK_SIZE] = { 0xff };
eeprom_pointer = address;
eeprom_buffer_data = erasedBlock;
eeprom_buffer_size = EEPROM_BLOCK_SIZE;
eeprom_read_operation = false;
Spi_complete = false;
sem_post(eeprom_write_sem);
#else
eepromWriteEnable();
eepromBlockErase(address);
#endif
if (blocking) {
eepromWaitSpiComplete();
eepromWaitReadStatus();
}
}
