static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, struct efx_rx_buffer *rx_buf, int len) { struct efx_nic *efx = rx_queue->efx; unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding; if (likely(len <= max_len)) return; /* The packet must be discarded, but this is only a fatal error * if the caller indicated it was */ rx_buf->flags |= EFX_RX_PKT_DISCARD; if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) { if (net_ratelimit()) netif_err(efx, rx_err, efx->net_dev, " RX queue %d seriously overlength " "RX event (0x%x > 0x%x+0x%x). Leaking\n", efx_rx_queue_index(rx_queue), len, max_len, efx->type->rx_buffer_padding); efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY); } else { if (net_ratelimit()) netif_err(efx, rx_err, efx->net_dev, " RX queue %d overlength RX event " "(0x%x > 0x%x)\n", efx_rx_queue_index(rx_queue), len, max_len); } efx_rx_queue_channel(rx_queue)->n_rx_overlength++; }
/** * efx_fast_push_rx_descriptors - push new RX descriptors quickly * @rx_queue: RX descriptor queue * * This will aim to fill the RX descriptor queue up to * @rx_queue->@max_fill. If there is insufficient atomic * memory to do so, a slow fill will be scheduled. * * The caller must provide serialisation (none is used here). In practise, * this means this function must run from the NAPI handler, or be called * when NAPI is disabled. */ void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue, bool atomic) { struct efx_nic *efx = rx_queue->efx; unsigned int fill_level, batch_size; int space, rc = 0; if (!rx_queue->refill_enabled) return; /* Calculate current fill level, and exit if we don't need to fill */ fill_level = (rx_queue->added_count - rx_queue->removed_count); EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries); if (fill_level >= rx_queue->fast_fill_trigger) goto out; /* Record minimum fill level */ if (unlikely(fill_level < rx_queue->min_fill)) { if (fill_level) rx_queue->min_fill = fill_level; } batch_size = efx->rx_pages_per_batch * efx->rx_bufs_per_page; space = rx_queue->max_fill - fill_level; EFX_BUG_ON_PARANOID(space < batch_size); netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev, "RX queue %d fast-filling descriptor ring from" " level %d to level %d\n", efx_rx_queue_index(rx_queue), fill_level, rx_queue->max_fill); do { rc = efx_init_rx_buffers(rx_queue, atomic); if (unlikely(rc)) { /* Ensure that we don't leave the rx queue empty */ if (rx_queue->added_count == rx_queue->removed_count) efx_schedule_slow_fill(rx_queue); goto out; } } while ((space -= batch_size) >= batch_size); netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev, "RX queue %d fast-filled descriptor ring " "to level %d\n", efx_rx_queue_index(rx_queue), rx_queue->added_count - rx_queue->removed_count); out: if (rx_queue->notified_count != rx_queue->added_count) efx_nic_notify_rx_desc(rx_queue); }
int efx_probe_rx_queue(struct efx_rx_queue *rx_queue) { struct efx_nic *efx = rx_queue->efx; unsigned int entries; int rc; /* Create the smallest power-of-two aligned ring */ entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE); EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE); rx_queue->ptr_mask = entries - 1; netif_dbg(efx, probe, efx->net_dev, "creating RX queue %d size %#x mask %#x\n", efx_rx_queue_index(rx_queue), efx->rxq_entries, rx_queue->ptr_mask); /* Allocate RX buffers */ rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer), GFP_KERNEL); if (!rx_queue->buffer) return -ENOMEM; rc = efx_nic_probe_rx(rx_queue); if (rc) { kfree(rx_queue->buffer); rx_queue->buffer = NULL; } return rc; }
void efx_remove_rx_queue(struct efx_rx_queue *rx_queue) { netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, "destroying RX queue %d\n", efx_rx_queue_index(rx_queue)); efx_nic_remove_rx(rx_queue); kfree(rx_queue->buffer); rx_queue->buffer = NULL; }
void efx_fini_rx_queue(struct efx_rx_queue *rx_queue) { int i; struct efx_nic *efx = rx_queue->efx; struct efx_rx_buffer *rx_buf; netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue)); /* A flush failure might have left rx_queue->enabled */ rx_queue->enabled = false; del_timer_sync(&rx_queue->slow_fill); efx_nic_fini_rx(rx_queue); /* Release RX buffers from the current read ptr to the write ptr */ if (rx_queue->buffer) { for (i = rx_queue->removed_count; i < rx_queue->added_count; i++) { unsigned index = i & rx_queue->ptr_mask; rx_buf = efx_rx_buffer(rx_queue, index); efx_fini_rx_buffer(rx_queue, rx_buf); } } /* Unmap and release the pages in the recycle ring. Remove the ring. */ for (i = 0; i <= rx_queue->page_ptr_mask; i++) { struct page *page = rx_queue->page_ring[i]; struct efx_rx_page_state *state; if (page == NULL) continue; state = page_address(page); dma_unmap_page(&efx->pci_dev->dev, state->dma_addr, PAGE_SIZE << efx->rx_buffer_order, DMA_FROM_DEVICE); put_page(page); } kfree(rx_queue->page_ring); rx_queue->page_ring = NULL; }
void efx_init_rx_queue(struct efx_rx_queue *rx_queue) { struct efx_nic *efx = rx_queue->efx; unsigned int max_fill, trigger, max_trigger; netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev, "initialising RX queue %d\n", efx_rx_queue_index(rx_queue)); /* Initialise ptr fields */ rx_queue->added_count = 0; rx_queue->notified_count = 0; rx_queue->removed_count = 0; rx_queue->min_fill = -1U; efx_init_rx_recycle_ring(efx, rx_queue); rx_queue->page_remove = 0; rx_queue->page_add = rx_queue->page_ptr_mask + 1; rx_queue->page_recycle_count = 0; rx_queue->page_recycle_failed = 0; rx_queue->page_recycle_full = 0; /* Initialise limit fields */ max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM; max_trigger = max_fill - efx->rx_pages_per_batch * efx->rx_bufs_per_page; if (rx_refill_threshold != 0) { trigger = max_fill * min(rx_refill_threshold, 100U) / 100U; if (trigger > max_trigger) trigger = max_trigger; } else { trigger = max_trigger; } rx_queue->max_fill = max_fill; rx_queue->fast_fill_trigger = trigger; /* Set up RX descriptor ring */ rx_queue->enabled = true; efx_nic_init_rx(rx_queue); }
void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, unsigned int n_frags, unsigned int len, u16 flags) { struct efx_nic *efx = rx_queue->efx; struct efx_channel *channel = efx_rx_queue_channel(rx_queue); struct efx_rx_buffer *rx_buf; rx_buf = efx_rx_buffer(rx_queue, index); rx_buf->flags |= flags; /* Validate the number of fragments and completed length */ if (n_frags == 1) { efx_rx_packet__check_len(rx_queue, rx_buf, len); } else if (unlikely(n_frags > EFX_RX_MAX_FRAGS) || unlikely(len <= (n_frags - 1) * EFX_RX_USR_BUF_SIZE) || unlikely(len > n_frags * EFX_RX_USR_BUF_SIZE) || unlikely(!efx->rx_scatter)) { /* If this isn't an explicit discard request, either * the hardware or the driver is broken. */ WARN_ON(!(len == 0 && rx_buf->flags & EFX_RX_PKT_DISCARD)); rx_buf->flags |= EFX_RX_PKT_DISCARD; } netif_vdbg(efx, rx_status, efx->net_dev, "RX queue %d received ids %x-%x len %d %s%s\n", efx_rx_queue_index(rx_queue), index, (index + n_frags - 1) & rx_queue->ptr_mask, len, (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "", (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : ""); /* Discard packet, if instructed to do so. Process the * previous receive first. */ if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) { efx_rx_flush_packet(channel); efx_discard_rx_packet(channel, rx_buf, n_frags); return; } if (n_frags == 1) rx_buf->len = len; /* Release and/or sync the DMA mapping - assumes all RX buffers * consumed in-order per RX queue. */ efx_sync_rx_buffer(efx, rx_buf, rx_buf->len); /* Prefetch nice and early so data will (hopefully) be in cache by * the time we look at it. */ prefetch(efx_rx_buf_va(rx_buf)); rx_buf->page_offset += efx->type->rx_buffer_hash_size; rx_buf->len -= efx->type->rx_buffer_hash_size; if (n_frags > 1) { /* Release/sync DMA mapping for additional fragments. * Fix length for last fragment. */ unsigned int tail_frags = n_frags - 1; for (;;) { rx_buf = efx_rx_buf_next(rx_queue, rx_buf); if (--tail_frags == 0) break; efx_sync_rx_buffer(efx, rx_buf, EFX_RX_USR_BUF_SIZE); } rx_buf->len = len - (n_frags - 1) * EFX_RX_USR_BUF_SIZE; efx_sync_rx_buffer(efx, rx_buf, rx_buf->len); } /* All fragments have been DMA-synced, so recycle pages. */ rx_buf = efx_rx_buffer(rx_queue, index); efx_recycle_rx_pages(channel, rx_buf, n_frags); /* Pipeline receives so that we give time for packet headers to be * prefetched into cache. */ efx_rx_flush_packet(channel); channel->rx_pkt_n_frags = n_frags; channel->rx_pkt_index = index; }