Example #1
0
/*
 * This initializes the IO-APIC and APIC hardware if this is
 * a UP kernel.
 */
int __init APIC_init_uniprocessor(void)
{
    if (disable_apic) {
        printk(KERN_INFO "Apic disabled\n");
        return -1;
    }
    if (!cpu_has_apic) {
        disable_apic = 1;
        printk(KERN_INFO "Apic disabled by BIOS\n");
        return -1;
    }

    verify_local_APIC();

    connect_bsp_APIC();

    physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
    apic_write(APIC_ID, SET_APIC_ID(boot_cpu_physical_apicid));

    setup_local_APIC();

    /*
     * Now enable IO-APICs, actually call clear_IO_APIC
     * We need clear_IO_APIC before enabling vector on BP
     */
    if (!skip_ioapic_setup && nr_ioapics)
        enable_IO_APIC();

    if (!smp_found_config || skip_ioapic_setup || !nr_ioapics)
        localise_nmi_watchdog();
    end_local_APIC_setup();

    if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
        setup_IO_APIC();
    else
        nr_ioapics = 0;
    setup_boot_APIC_clock();
    check_nmi_watchdog();
    return 0;
}
/*
 * Report back to the Boot Processor during boot time or to the caller processor
 * during CPU online.
 */
static void __cpuinit smp_callin(void)
{
    int cpuid, phys_id;
    unsigned long timeout;

    /*
     * If waken up by an INIT in an 82489DX configuration
     * we may get here before an INIT-deassert IPI reaches
     * our local APIC.  We have to wait for the IPI or we'll
     * lock up on an APIC access.
     *
     * Since CPU0 is not wakened up by INIT, it doesn't wait for the IPI.
     */
    cpuid = smp_processor_id();
    if (apic->wait_for_init_deassert && cpuid != 0)
        apic->wait_for_init_deassert(&init_deasserted);

    /*
     * (This works even if the APIC is not enabled.)
     */
    phys_id = read_apic_id();
    if (cpumask_test_cpu(cpuid, cpu_callin_mask)) {
        panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
              phys_id, cpuid);
    }
    pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);

    /*
     * STARTUP IPIs are fragile beasts as they might sometimes
     * trigger some glue motherboard logic. Complete APIC bus
     * silence for 1 second, this overestimates the time the
     * boot CPU is spending to send the up to 2 STARTUP IPIs
     * by a factor of two. This should be enough.
     */

    /*
     * Waiting 2s total for startup (udelay is not yet working)
     */
    timeout = jiffies + 2*HZ;
    while (time_before(jiffies, timeout)) {
        /*
         * Has the boot CPU finished it's STARTUP sequence?
         */
        if (cpumask_test_cpu(cpuid, cpu_callout_mask))
            break;
        cpu_relax();
    }

    if (!time_before(jiffies, timeout)) {
        panic("%s: CPU%d started up but did not get a callout!\n",
              __func__, cpuid);
    }

    /*
     * the boot CPU has finished the init stage and is spinning
     * on callin_map until we finish. We are free to set up this
     * CPU, first the APIC. (this is probably redundant on most
     * boards)
     */

    pr_debug("CALLIN, before setup_local_APIC()\n");
    if (apic->smp_callin_clear_local_apic)
        apic->smp_callin_clear_local_apic();
    setup_local_APIC();
    end_local_APIC_setup();

    /*
     * Need to setup vector mappings before we enable interrupts.
     */
    setup_vector_irq(smp_processor_id());

    /*
     * Save our processor parameters. Note: this information
     * is needed for clock calibration.
     */
    smp_store_cpu_info(cpuid);

    /*
     * Get our bogomips.
     * Update loops_per_jiffy in cpu_data. Previous call to
     * smp_store_cpu_info() stored a value that is close but not as
     * accurate as the value just calculated.
     */
    calibrate_delay();
    cpu_data(cpuid).loops_per_jiffy = loops_per_jiffy;
    pr_debug("Stack at about %p\n", &cpuid);

    /*
     * This must be done before setting cpu_online_mask
     * or calling notify_cpu_starting.
     */
    set_cpu_sibling_map(raw_smp_processor_id());
    wmb();

    notify_cpu_starting(cpuid);

    /*
     * Allow the master to continue.
     */
    cpumask_set_cpu(cpuid, cpu_callin_mask);
}
Example #3
0
/*
 * Report back to the Boot Processor during boot time or to the caller processor
 * during CPU online.
 */
static void smp_callin(void)
{
	int cpuid, phys_id;

	/*
	 * If waken up by an INIT in an 82489DX configuration
	 * we may get here before an INIT-deassert IPI reaches
	 * our local APIC.  We have to wait for the IPI or we'll
	 * lock up on an APIC access.
	 *
	 * Since CPU0 is not wakened up by INIT, it doesn't wait for the IPI.
	 */
	cpuid = smp_processor_id();
	if (apic->wait_for_init_deassert && cpuid)
		while (!atomic_read(&init_deasserted))
			cpu_relax();

	/*
	 * (This works even if the APIC is not enabled.)
	 */
	phys_id = read_apic_id();

	/*
	 * the boot CPU has finished the init stage and is spinning
	 * on callin_map until we finish. We are free to set up this
	 * CPU, first the APIC. (this is probably redundant on most
	 * boards)
	 */

	pr_debug("CALLIN, before setup_local_APIC()\n");
	if (apic->smp_callin_clear_local_apic)
		apic->smp_callin_clear_local_apic();
	setup_local_APIC();
	end_local_APIC_setup();

	/*
	 * Need to setup vector mappings before we enable interrupts.
	 */
	setup_vector_irq(smp_processor_id());

	/*
	 * Save our processor parameters. Note: this information
	 * is needed for clock calibration.
	 */
	smp_store_cpu_info(cpuid);

	/*
	 * Get our bogomips.
	 * Update loops_per_jiffy in cpu_data. Previous call to
	 * smp_store_cpu_info() stored a value that is close but not as
	 * accurate as the value just calculated.
	 */
	calibrate_delay();
	cpu_data(cpuid).loops_per_jiffy = loops_per_jiffy;
	pr_debug("Stack at about %p\n", &cpuid);

	/*
	 * This must be done before setting cpu_online_mask
	 * or calling notify_cpu_starting.
	 */
	set_cpu_sibling_map(raw_smp_processor_id());
	wmb();

	notify_cpu_starting(cpuid);

	/*
	 * Allow the master to continue.
	 */
	cpumask_set_cpu(cpuid, cpu_callin_mask);
}
Example #4
0
int __init APIC_init_uniprocessor(void)
{
    if (disable_apic) {
        pr_info("Apic disabled\n");
        return -1;
    }
#ifdef CONFIG_X86_64
    if (!cpu_has_apic) {
        disable_apic = 1;
        pr_info("Apic disabled by BIOS\n");
        return -1;
    }
#else
    if (!smp_found_config && !cpu_has_apic)
        return -1;


    if (!cpu_has_apic &&
            APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid])) {
        pr_err("BIOS bug, local APIC 0x%x not detected!...\n",
               boot_cpu_physical_apicid);
        return -1;
    }
#endif

    enable_IR_x2apic();
#ifdef CONFIG_X86_64
    default_setup_apic_routing();
#endif

    verify_local_APIC();
    connect_bsp_APIC();

#ifdef CONFIG_X86_64
    apic_write(APIC_ID, SET_APIC_ID(boot_cpu_physical_apicid));
#else

# ifdef CONFIG_CRASH_DUMP
    boot_cpu_physical_apicid = read_apic_id();
# endif
#endif
    physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
    setup_local_APIC();

#ifdef CONFIG_X86_IO_APIC

    if (!skip_ioapic_setup && nr_ioapics)
        enable_IO_APIC();
#endif

    end_local_APIC_setup();

#ifdef CONFIG_X86_IO_APIC
    if (smp_found_config && !skip_ioapic_setup && nr_ioapics)
        setup_IO_APIC();
    else {
        nr_ioapics = 0;
        localise_nmi_watchdog();
    }
#else
    localise_nmi_watchdog();
#endif

    x86_init.timers.setup_percpu_clockev();
#ifdef CONFIG_X86_64
    check_nmi_watchdog();
#endif

    return 0;
}