void __init evt_lcd_panel_init(void) { #ifdef CONFIG_PANEL_HANNSTAR int board_id; board_id = ep_get_hardware_id(); switch(board_id) { case BOARD_ID_EVT2: EDP_LCD_PWR_EN_GPIO = 47; break; // case BOARD_ID_EVT3: // EDP_LCD_PWR_EN_GPIO = 88; // break; default: EDP_LCD_PWR_EN_GPIO = 88; break; } omap_display_init(&evt_dss_data); /*++++ 20110224, JimmySu modify for PWM */ printk("[CES-demo]:gpio_request()++++++\n"); gpio_request(EDP_LCD_PANEL_BACKLIGHT_GPIO, "lcd backlight"); // gpio_request(EDP_LCD_PANEL_ADJ_PWM_GPIO, "lcd adj PWM"); /*++++20110404, Jimmy Su add for EVT2 LCD*/ gpio_request(EDP_LCD_PWR_EN_GPIO, "LCD_PWR_EN"); // gpio_request(EDP_LVDS_CLKSEL_GPIO, "lcd LVDS_CLKSEL_GPIO"); //&*&*&*BC_110525: disable gpio 90 to fix display flicker for EVT2 /*++++20110404, Jimmy Su add for EVT2 LCD*/ gpio_direction_output(EDP_LCD_PANEL_BACKLIGHT_GPIO, 1); // gpio_direction_output(EDP_LCD_PANEL_ADJ_PWM_GPIO, 1); /*++++20110404, Jimmy Su add for EVT2 LCD*/ gpio_direction_output(EDP_LCD_PWR_EN_GPIO, 1); // gpio_direction_output(EDP_LVDS_CLKSEL_GPIO, 1); //&*&*&*BC_110525: disable gpio 90 to fix display flicker for EVT2 /*++++20110404, Jimmy Su add for EVT2 LCD*/ printk("[CES-demo]:gpio_request()------\n"); /*---- 20110224, JimmySu modify for PWM */ #else printk(" %s, %d: calling boxer_backlight_init()\n",__FILE__,__LINE__); boxer_backlight_init(); printk(" %s, %d: calling spi_register_board_info()\n",__FILE__,__LINE__); omap_display_init(&evt_dss_data); spi_register_board_info(evt_spi_board_info, ARRAY_SIZE(evt_spi_board_info)); // printk(" %s, %d: calling platform_add_devices()\n",__FILE__,__LINE__); // platform_add_devices(evt_panel_devices, ARRAY_SIZE(evt_panel_devices)); //20110504, JimmySu remove un-used #endif //CONFIG_PANEL_HANNSTAR }
static int at070tna2_panel_probe(struct omap_dss_device *dssdev) { /*+++++20110902, JimmySu add board ID*/ int board_id; board_id = ep_get_hardware_id(); switch(board_id) { case BOARD_ID_EVT1: at070tna2_hw_version =3; break; default: at070tna2_hw_version =6; break; } /*----20110902, JimmySu add board ID*/ printk("----------[EP5a]: %s-----------\n", __func__); dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IHS ; dssdev->panel.timings = at070tna2_panel_timings; dssdev->ctrl.pixel_size = 24; //&*&*&*BC1_110817: fix the issue that user can see screen switch when device resume INIT_DELAYED_WORK(&delay_work_enablepanel, omap_delay_work_enablepanel); wake_lock_init(&panel_wake_lock, WAKE_LOCK_SUSPEND, "panel_wakelock"); //&*&*&*BC2_110817: fix the issue that user can see screen switch when device resume gpio_request(EDP_LCD_LVDS_CLKSEL, "lcd LVDS CLKSEL"); gpio_request(EDP_LCD_LVDS_SHTDN_GPIO, "lcd LVDS SHTN"); gpio_request(EDP_LCD_PWR_EN, "lcd_panel Power_EN"); gpio_request(EDP_LCD_BL_SW, "lcd_panel backlight switch"); /*touch*/ if (at070tna2_hw_version != BOARD_ID_EVT1){ INIT_DELAYED_WORK(&delay_work_enabletouch, omap_delay_work_enabletouch); wake_lock_init(&touch_wake_lock, WAKE_LOCK_SUSPEND, "panel_wakelock"); gpio_request(EP5A_EVT_TOUCH_RST, "touch_rst"); gpio_request(EP5A_EVT_TOUCH_EN, "touch_en"); } /*touch*/ gpio_direction_output(EDP_LCD_LVDS_CLKSEL, 0); //20110816, modify by JimmySu to fix panel color omap_set_primary_brightness(100); //20111101, JimmySu trun-on backlight when panel probe return 0; }
void __init evt_peripherals_init(void) { //&*&*&*SJ1_20110419, Add /proc file to display software and hardware version. #if defined (CONFIG_PROCFS_DISPLAY_SW_HW_VERSION) get_share_region(); #endif //&*&*&*SJ2_20110419, Add /proc file to display software and hardware version. //&*&*&*BC1_110615: fix the issue that system can not enter off mode twl4030_get_scripts(&evt_t2scripts_data); //&*&*&*BC2_110615: fix the issue that system can not enter off mode #ifdef CONFIG_ANDROID_RAM_CONSOLE platform_device_register(&ram_console_device); #endif omap_i2c_init(); platform_add_devices( evt_board_devices, ARRAY_SIZE(evt_board_devices) ); platform_add_devices( evt_board_devices_2, ARRAY_SIZE(evt_board_devices_2) ); #ifdef CONFIG_ENCORE_MODEM_MGR if (is_encore_3g()) { platform_device_register(&encore_modem_mgr_device); } #endif #ifdef CONFIG_SND_SOC_TLV320DAC3100 audio_dac_3100_dev_init(); #endif /***++++20110115, jimmySu add backlight driver for PWM***/ #ifdef CONFIG_LEDS_OMAP_DISPLAY gptimer8 = (unsigned long)ioremap(0x4903E000, 16); //&*&*&*HC1_20110826, modify pwm init sequence //zoom_pwm_init(); omap_set_primary_brightness(100); //&*&*&*HC2_20110826, modify pwm init sequence #endif // CONFIG_LEDS_OMAP_DISPLAY /***-----20110115, jimmySu add backlight driver for PWM***/ /* NOTE: Please deselect CONFIG_MACH_OMAP_USE_UART3 in order to init * only UART1 and UART2, all in the name of saving some power. */ omap_serial_init(omap_serial_platform_data); evt_lcd_panel_init(); // kxtf9_dev_init(); #ifdef CONFIG_BATTERY_MAX17042 max17042_dev_init(); #endif usb_musb_init(&musb_board_data); //&*&*&*SJ1_20110607 #if defined (CONFIG_ANDROID_FACTORY_DEFAULT_REBOOT) android_factory_default_init(); #endif //&*&*&*SJ2_20110607 /*+++++20110902, JimmySu add board ID*/ int board_id; board_id = ep_get_hardware_id(); switch(board_id) { case BOARD_ID_EVT1: peripheral_hw_version =3; break; default: peripheral_hw_version =6; break; } /*----20110902, JimmySu add board ID*/ }
/** * ehci_hcd_omap_probe - initialize TI-based HCDs * * Allocates basic resources for this USB host controller, and * then invokes the start() method for the HCD associated with it * through the hotplug entry's driver_data. */ static int ehci_hcd_omap_probe(struct platform_device *pdev) { struct ehci_hcd_omap_platform_data *pdata = pdev->dev.platform_data; struct ehci_hcd_omap *omap; struct resource *res; struct usb_hcd *hcd; int irq = platform_get_irq(pdev, 0); int ret = -ENODEV; printk(KERN_DEBUG " ehci_hcd_omap_probe\n"); if (!pdata) { dev_dbg(&pdev->dev, "missing platform_data\n"); goto err_pdata; } if (usb_disabled()) { printk(KERN_DEBUG " usb_disabled\n"); goto err_disabled; } omap = kzalloc(sizeof(*omap), GFP_KERNEL); printk(KERN_DEBUG " kzalloc done\n"); if (!omap) { printk(KERN_DEBUG " problem with memory allocation\n"); ret = -ENOMEM; goto err_disabled; } hcd = usb_create_hcd(&ehci_omap_hc_driver, &pdev->dev, dev_name(&pdev->dev)); printk(KERN_DEBUG " usb_create hcd done\n"); if (!hcd) { printk(KERN_DEBUG " failed to create HCD\n"); dev_dbg(&pdev->dev, "failed to create hcd with err %d\n", ret); ret = -ENOMEM; goto err_create_hcd; } platform_set_drvdata(pdev, omap); omap->dev = &pdev->dev; omap->phy_reset = pdata->phy_reset; omap->reset_gpio_port[0] = pdata->reset_gpio_port[0]; omap->reset_gpio_port[1] = pdata->reset_gpio_port[1]; omap->reset_gpio_port[2] = pdata->reset_gpio_port[2]; omap->port_mode[0] = pdata->port_mode[0]; omap->port_mode[1] = pdata->port_mode[1]; omap->port_mode[2] = pdata->port_mode[2]; omap->ehci = hcd_to_ehci(hcd); omap->ehci->sbrn = 0x20; omap->suspended = 0; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); printk(KERN_DEBUG " platform get ressources 0 done\n"); hcd->rsrc_start = res->start; hcd->rsrc_len = resource_size(res); hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); if (!hcd->regs) { printk(KERN_DEBUG " EHCI ioremap failed\n"); dev_err(&pdev->dev, "EHCI ioremap failed\n"); ret = -ENOMEM; goto err_ioremap; } /* we know this is the memory we want, no need to ioremap again */ omap->ehci->caps = hcd->regs; omap->ehci_base = hcd->regs; res = platform_get_resource(pdev, IORESOURCE_MEM, 1); printk(KERN_DEBUG " platform get ressources 1 done\n"); omap->uhh_base = ioremap(res->start, resource_size(res)); if (!omap->uhh_base) { printk(KERN_DEBUG " UHH ioremap failed\n"); dev_err(&pdev->dev, "UHH ioremap failed\n"); ret = -ENOMEM; goto err_uhh_ioremap; } res = platform_get_resource(pdev, IORESOURCE_MEM, 2); printk(KERN_DEBUG " platform get ressources 2 done\n"); ret = omap_start_ehc(omap, hcd); if (ret) { dev_dbg(&pdev->dev, "failed to start ehci\n"); printk(KERN_DEBUG " failed to start ehci\n"); goto err_start; } omap->ehci->regs = hcd->regs + HC_LENGTH(readl(&omap->ehci->caps->hc_capbase)); dbg_hcs_params(omap->ehci, "reset"); dbg_hcc_params(omap->ehci, "reset"); /* cache this readonly data; minimize chip reads */ omap->ehci->hcs_params = readl(&omap->ehci->caps->hcs_params); /* SET 1 micro-frame Interrupt interval */ writel(readl(&omap->ehci->regs->command) | (1 << 16), &omap->ehci->regs->command); ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); if (ret) { dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret); goto err_add_hcd; } EP10_HW_ID=ep_get_hardware_id(); if(EP10_HW_ID==BOARD_VERSION_UNKNOWN) { EP10_HW_ID = BOARD_ID_DVT1 ; } printk(KERN_DEBUG " add hcd done\n"); return 0; err_add_hcd: omap_stop_ehc(omap, hcd); err_start: //iounmap(omap->tll_base); err_tll_ioremap: iounmap(omap->uhh_base); err_uhh_ioremap: iounmap(hcd->regs); err_ioremap: usb_put_hcd(hcd); err_create_hcd: kfree(omap); err_disabled: err_pdata: return ret; }
/* omap_start_ehc * - Start the TI USBHOST controller */ static int omap_start_ehc(struct ehci_hcd_omap *omap, struct usb_hcd *hcd) { unsigned long timeout = jiffies + msecs_to_jiffies(1000); u8 tll_ch_mask = 0; unsigned reg = 0; int ret = 0; printk("omap_start_ehc kernel 2.6.35 V0.7 [09/02/2011] \n"); gpio_direction_output(23, 0); PHY_reset = 0; #ifndef CONFIG_MODEM_SMS gpio_direction_output(21, 1); gpio_direction_output(35, 1); gpio_direction_output(36, 1); EP10_HW_ID=ep_get_hardware_id(); if(EP10_HW_ID==BOARD_VERSION_UNKNOWN) { EP10_HW_ID = BOARD_ID_DVT1 ; } if(EP10_HW_ID>=BOARD_ID_DVT1) { gpio_direction_output(109, 1); //printk("GPIO-109 enabled \n"); } //printk("HW-ver= %d\n",EP10_HW_ID); modem_PW = 1; #endif dev_dbg(omap->dev, "starting TI EHCI USB Controller\n"); /* Get all the clock handles we need */ omap->usbhost_ick = clk_get(omap->dev, "usbhost_ick"); if (IS_ERR(omap->usbhost_ick)) { dev_err(omap->dev, "could not get usbhost_ick\n"); ret = PTR_ERR(omap->usbhost_ick); goto err_host_ick; } omap->usbhost2_120m_fck = clk_get(omap->dev, "usbhost_120m_fck"); if (IS_ERR(omap->usbhost2_120m_fck)) { dev_err(omap->dev, "could not get usbhost2_120m_fck\n"); ret = PTR_ERR(omap->usbhost2_120m_fck); goto err_host_120m_fck; } omap->usbhost1_48m_fck = clk_get(omap->dev, "usbhost_48m_fck"); if (IS_ERR(omap->usbhost1_48m_fck)) { dev_err(omap->dev, "could not get usbhost_48m_fck\n"); ret = PTR_ERR(omap->usbhost1_48m_fck); goto err_host_48m_fck; } if (omap->phy_reset) { printk(KERN_DEBUG "reset the phys\n"); /* Refer: ISSUE1 */ if (gpio_is_valid(omap->reset_gpio_port[0])) { gpio_request(omap->reset_gpio_port[0], "USB1 PHY reset"); gpio_direction_output(omap->reset_gpio_port[0], 0); } if (gpio_is_valid(omap->reset_gpio_port[1])) { gpio_request(omap->reset_gpio_port[1],"USB2 PHY reset"); gpio_direction_output(omap->reset_gpio_port[1], 0); } /* Hold the PHY in RESET for enough time till DIR is high */ udelay(10); } omap->usbtll_fck = clk_get(omap->dev, "usbtll_fck"); if (IS_ERR(omap->usbtll_fck)) { dev_err(omap->dev, "could not get usbtll_fck\n"); ret = PTR_ERR(omap->usbtll_fck); goto err_tll_fck; } omap->usbtll_ick = clk_get(omap->dev, "usbtll_ick"); if (IS_ERR(omap->usbtll_ick)) { dev_err(omap->dev, "could not get usbtll_ick\n"); ret = PTR_ERR(omap->usbtll_ick); goto err_tll_ick; } /* Now enable all the clocks in the correct order */ ehci_omap_clock_power(omap, 1); /* Put UHH in NoIdle/NoStandby mode */ reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_SYSCONFIG); reg |= OMAP_UHH_SYSCONFIG_CACTIVITY | OMAP_UHH_SYSCONFIG_AUTOIDLE | OMAP_UHH_SYSCONFIG_ENAWAKEUP; reg &= ~(OMAP_UHH_SYSCONFIG_SIDLEMASK | OMAP_UHH_SYSCONFIG_MIDLEMASK); reg |= OMAP_UHH_SYSCONFIG_NOIDLE | OMAP_UHH_SYSCONFIG_NOSTDBY; ehci_omap_writel(omap->uhh_base, OMAP_UHH_SYSCONFIG, reg); reg = ehci_omap_readl(omap->uhh_base, OMAP_UHH_HOSTCONFIG); /* setup ULPI bypass and burst configurations */ reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN); reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN; if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_UNKNOWN) reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS; if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_UNKNOWN) reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS; if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_UNKNOWN) reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS; /* Bypass the TLL module for PHY mode operation */ if (cpu_is_omap3430() && (omap_rev() <= OMAP3430_REV_ES2_1)) { dev_dbg(omap->dev, "OMAP3 ES version <= ES2.1\n"); if ((omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) || (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) || (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY)) reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; else reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS; } else { dev_dbg(omap->dev, "OMAP3 ES version > ES2.1\n"); if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_PHY) reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; else if (omap->port_mode[0] == EHCI_HCD_OMAP_MODE_TLL) reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS; if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_PHY) reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; else if (omap->port_mode[1] == EHCI_HCD_OMAP_MODE_TLL) reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS; if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_PHY) reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; else if (omap->port_mode[2] == EHCI_HCD_OMAP_MODE_TLL) reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS; } ehci_omap_writel(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg); dev_dbg(omap->dev, "UHH setup done, uhh_hostconfig=%x\n", reg); /* * An undocumented "feature" in the OMAP3 EHCI controller, * causes suspended ports to be taken out of suspend when * the USBCMD.Run/Stop bit is cleared (for example when * we do ehci_bus_suspend). * This breaks suspend-resume if the root-hub is allowed * to suspend. Writing 1 to this undocumented register bit * disables this feature and restores normal behavior. */ ehci_omap_writel(omap->ehci_base, EHCI_INSNREG04, EHCI_INSNREG04_DISABLE_UNSUSPEND); if (omap->phy_reset) { printk(KERN_DEBUG "unreset the phys\n"); /* Refer ISSUE1: * Hold the PHY in RESET for enough time till * PHY is settled and ready */ udelay(10); if (gpio_is_valid(omap->reset_gpio_port[0])) gpio_set_value(omap->reset_gpio_port[0], 1); if (gpio_is_valid(omap->reset_gpio_port[1])) gpio_set_value(omap->reset_gpio_port[1], 1); } //gpio_direction_output(21, 1); //gpio_direction_output(36, 1); //gpio_direction_output(35, 1); //msleep(10); printk("RESET USB PHY\n"); gpio_direction_output(23, 1); PHY_reset = 1; return 0; err_sys_status: ehci_omap_clock_power(omap, 0); clk_put(omap->usbtll_ick); err_tll_ick: clk_put(omap->usbtll_fck); err_tll_fck: clk_put(omap->usbhost1_48m_fck); if (omap->phy_reset) { if (gpio_is_valid(omap->reset_gpio_port[0])) gpio_free(omap->reset_gpio_port[0]); if (gpio_is_valid(omap->reset_gpio_port[1])) gpio_free(omap->reset_gpio_port[1]); } err_host_48m_fck: clk_put(omap->usbhost2_120m_fck); err_host_120m_fck: clk_put(omap->usbhost_ick); err_host_ick: return ret; }