void __init epit_timer_init(void __iomem *base, int irq)
{
	struct clk *timer_clk;

	timer_clk = clk_get_sys("imx-epit.0", NULL);
	if (IS_ERR(timer_clk)) {
		pr_err("i.MX epit: unable to get clk\n");
		return;
	}

	clk_prepare_enable(timer_clk);

	timer_base = base;

	/*
	 * Initialise to a known state (all timers off, and timing reset)
	 */
	imx_writel(0x0, timer_base + EPITCR);

	imx_writel(0xffffffff, timer_base + EPITLR);
	imx_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
		   timer_base + EPITCR);

	/* init and register the timer to the framework */
	epit_clocksource_init(timer_clk);
	epit_clockevent_init(timer_clk);

	/* Make irqs happen */
	setup_irq(irq, &epit_timer_irq);
}
Example #2
0
void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
{
	clk_prepare_enable(timer_clk);

	timer_base = base;

	__raw_writel(0x0, timer_base + EPITCR);

	__raw_writel(0xffffffff, timer_base + EPITLR);
	__raw_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
			timer_base + EPITCR);

	
	epit_clocksource_init(timer_clk);
	epit_clockevent_init(timer_clk);

	
	setup_irq(irq, &epit_timer_irq);
}
void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
{
	clk_enable(timer_clk);

	timer_base = base;

	/*
	 * Initialise to a known state (all timers off, and timing reset)
	 */
	__raw_writel(0x0, timer_base + EPITCR);

	__raw_writel(0xffffffff, timer_base + EPITLR);
	__raw_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
			timer_base + EPITCR);

	/* init and register the timer to the framework */
	epit_clocksource_init(timer_clk);
	epit_clockevent_init(timer_clk);

	/* Make irqs happen */
	setup_irq(irq, &epit_timer_irq);
}
Example #4
0
int __init arch_clocksource_init(void)
{
	return epit_clocksource_init();
}