static int mb618_phy_reset(void *bus)
{
epld_write(1, 0); /* bank = Ctrl */
/* Bring the PHY out of reset in MII mode */
epld_write(0x4 | 0, 4);
epld_write(0x4 | 1, 4);
return 1;
}
static int mb705_init_epld(void)
{
const unsigned short test_value = 0x1234u;
unsigned short epld_reg;
unsigned short epld_version, board_version;
/* write (anything) to the test register */
epld_write(test_value, EPLD_TEST);
/* verify we got back an inverted result */
epld_reg = epld_read(EPLD_TEST);
if (epld_reg != (test_value ^ 0xffffu)) {
printf("Failed EPLD test (offset=%02x, result=%04x)\n",
EPLD_TEST, epld_reg);
return 1;
}
/* Assume we can trust the version register */
epld_reg = epld_read(EPLD_IDENT);
board_version = epld_reg >> 4 & 0xfu;
epld_version = epld_reg & 0xfu;
/* display the board revision, and EPLD version */
printf("MB705: revision %c, EPLD version %02d\n",
board_version + 'A' - 1,
epld_version);
/* return a "success" result */
return 0;
}
void flashWriteDisable(void)
{
#if defined(CONFIG_ST40_MB705)
unsigned short epld_reg;
/* Disable Vpp for writing to flash */
epld_reg = epld_read(EPLD_MISC);
epld_reg &= ~(1u << 3); /* NandFlashWP = MISC[3] = 0 */
epld_reg &= ~(1u << 2); /* NorFlashVpp = MISC[2] = 0 */
epld_write(epld_reg, EPLD_MISC);
#endif /* CONFIG_ST40_MB705 */
}
void flashWriteEnable(void)
{
#if defined(CONFIG_SH_MB705)
unsigned short epld_reg;
/* Enable Vpp for writing to flash */
epld_reg = epld_read(EPLD_MISC);
epld_reg |= 1u << 3; /* NandFlashWP = MISC[3] = 1 */
epld_reg |= 1u << 2; /* NorFlashVpp = MISC[2] = 1 */
epld_write(epld_reg, EPLD_MISC);
#endif /* CONFIG_SH_MB705 */
}
static void mb628_led_set(struct led_classdev *led_cdev,
enum led_brightness brightness)
{
u8 reg;
/* Locking required here */
reg = epld_read(EPLD_ENABLE);
if (brightness)
reg |= EPLD_ENABLE_HBEAT;
else
reg &= ~EPLD_ENABLE_HBEAT;
epld_write(reg, EPLD_ENABLE);
}
static void __init mb618_init_irq(void)
{
unsigned char epld_reg;
const int test_offset = 4;
const int version_offset = 0;
int version;
epld_early_init(&epld_device);
epld_write(0, 0); /* bank = Test */
epld_write(0x63, test_offset);
epld_reg = epld_read(test_offset);
if (epld_reg != (unsigned char)(~0x63)) {
printk(KERN_WARNING
"Failed mb618 EPLD test (off %02x, res %02x)\n",
test_offset, epld_reg);
return;
}
version = epld_read(version_offset) & 0x1f;
printk(KERN_INFO "mb618 EPLD version %02d\n", version);
/*
* We have the nice new shiny interrupt system at last.
* For the moment just replicate the functionality to
* route the STEM interrupt through.
*/
/* Route STEM Int0 (EPLD int 4) to output 2 */
epld_write(3, 0); /* bank = IntPri1 */
epld_reg = epld_read(4);
epld_reg &= 0xfc;
epld_reg |= 2;
epld_write(epld_reg, 4);
/* Enable it */
epld_write(1<<4, 8);
}
static ssize_t store_udef(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct display_data *dd = dev_get_drvdata(dev);
int code = attr - dev_attr_udef;
int display;
spin_lock(&dd->lock);
for (display=0; display < 2; display++) {
int base = (display == 0) ? EPLD_TS_DISPLAY0_BASE : EPLD_TS_DISPLAY1_BASE;
int i;
epld_write(code, base + UDC_ADDRESS_OFF);
for (i=0; (i < 7) && (i < count); i++)
epld_write(buf[i], base + UDC_RAM_OFF + (i << 1));
}
spin_unlock(&dd->lock);
return count;
}
static ssize_t store_text(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
struct display_data *dd = dev_get_drvdata(dev);
int c;
spin_lock(&dd->lock);
for (c=0; c<16; c++) {
int base = ((c<8) ? EPLD_TS_DISPLAY1_BASE : EPLD_TS_DISPLAY0_BASE) + CHAR_RAM_OFF;
int off = c & 7;
int data = (c<count) ? buf[c] : ' ';
epld_write(data, base + (off << 1));
}
spin_unlock(&dd->lock);
return count;
}
static void enable_harp_irq(unsigned int irq)
{
unsigned maskReg;
unsigned mask;
int pri;
if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
return;
pri = 15 - irq;
if (pri < 8) {
maskReg = EPLD_INTMASK0SET;
} else {
maskReg = EPLD_INTMASK1SET;
pri -= 8;
}
mask = 1 << pri;
epld_write(mask, maskReg);
}
static int __init mb705_display_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
int res;
struct display_data *dd;
int i;
char string[17];
int string_len;
dd = devm_kzalloc(dev, sizeof(*dd), GFP_KERNEL);
if (dd == NULL)
return -ENOMEM;
spin_lock_init(&dd->lock);
platform_set_drvdata(pdev, dd);
res = device_create_file(dev, &dev_attr_text);
if (res)
return res;
for (i=0; i<16; i++) {
if (device_create_file(dev, &dev_attr_udef[i])) {
dev_warn(dev, "%s: failed to create udef sysfs entry\n",
__func__);
}
}
/* notFL signal is controlled by DisplayCtrlReg[0] */
epld_write(1, EPLD_TS_DISPLAY_CTRL_REG);
string_len = scnprintf(string, sizeof(string), "MB705%c", mb705_rev);
store_text(dev, NULL, string, string_len);
return 0;
}
static void disable_harp_irq(unsigned int irq)
{
unsigned maskReg;
unsigned mask;
int pri;
if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
return;
pri = 15 - irq;
if (pri < 8) {
maskReg = EPLD_INTMASK0CLR;
} else {
maskReg = EPLD_INTMASK1CLR;
pri -= 8;
}
mask = 1 << pri;
epld_write(mask, maskReg);
/* Read back the value we just wrote to flush any write posting */
epld_read(maskReg);
}
extern void flashWriteDisable(void)
{
/* Disable Vpp for writing to flash */
epld_write(2, EPLD_FLASH);
}
extern void flashWriteEnable(void)
{
/* Enable Vpp for writing to flash */
epld_write(3, EPLD_FLASH);
}
static void __init disable_all_interrupts(void)
{
epld_write(0x00, EPLD_INTMASK0);
epld_write(0x00, EPLD_INTMASK1);
}
