static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst) { #ifdef CS_MMAP if (dst >= DUMMY_MMAP_BUFFER_START && dst < DUMMY_MMAP_BUFFER_END) { if ((addr - SPIFFS_PAGE_HEADER_SIZE) % LOG_PAGE_SIZE == 0) { LOG(LL_DEBUG, ("mmap spiffs prep read: %x %u %p", addr, size, dst)); #ifndef DISABLE_OTA /* * If FW uses OTA (and flash mapping) addr might be > 0x100000 * and FLASH_BASE + addr will point somewhere behind flash * mapped area (40200000h-40300000h) * So, we need map it back. */ addr &= 0xFFFFF; #endif cur_mmap_desc->blocks[cur_mmap_desc->pages++] = FLASH_BASE + addr; } return SPIFFS_OK; } #endif if (0 && addr % FLASH_UNIT_SIZE == 0 && size % FLASH_UNIT_SIZE == 0) { /* * For unknown reason spi_flash_read/write * hangs from time to time if size is small (< 8) * and address is not aligned to 0xFF * TODO(alashkin): understand why and remove `0 &&` from `if` */ return spi_flash_read(addr, (u32_t *) dst, size); } else { return esp_spiffs_readwrite(addr, size, dst, 0); } }
static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst) { if (addr % FLASH_UNIT_SIZE == 0 && size % FLASH_UNIT_SIZE == 0) { /* * Address & bufsize are aligned to 4, just reading * Since the most of operations are aligned there is no * reason always read into temporaty buffer */ return spi_flash_read(addr, (u32_t *) dst, size); } else { return esp_spiffs_readwrite(addr, size, dst, 0); } }
static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src) { if (addr % FLASH_UNIT_SIZE == 0 && size % FLASH_UNIT_SIZE == 0) { /* * Address & bufsize are aligned to 4, just reading * Since the most of operations are aligned there is no * reason always pre-read & over-write */ return spi_flash_write(addr, (u32_t *) src, size); } else { return esp_spiffs_readwrite(addr, size, src, 1); } }
static s32_t esp_spiffs_write(u32_t addr, u32_t size, u8_t *src) { if (0 && addr % FLASH_UNIT_SIZE == 0 && size % FLASH_UNIT_SIZE == 0) { /* * For unknown reason spi_flash_read/write * hangs from time to time if size is small (< 8) * and address is not aligned to 0xFF * TODO(alashkin): understand why and remove `0 &&` from `if` */ return spi_flash_write(addr, (u32_t *) src, size); } else { return esp_spiffs_readwrite(addr, size, src, 1); } }
static s32_t esp_spiffs_read(u32_t addr, u32_t size, u8_t *dst) { #ifdef CS_MMAP if (dst >= DUMMY_MMAP_BUFFER_START && dst < DUMMY_MMAP_BUFFER_END) { if ((addr - SPIFFS_PAGE_HEADER_SIZE) % LOG_PAGE_SIZE == 0) { fprintf(stderr, "mmap spiffs prep read: %x %u %p\n", addr, size, dst); cur_mmap_desc->blocks[cur_mmap_desc->pages++] = FLASH_BASE + addr; } return SPIFFS_OK; } #endif if (0 && addr % FLASH_UNIT_SIZE == 0 && size % FLASH_UNIT_SIZE == 0) { /* * For unknown reason spi_flash_read/write * hangs from time to time if size is small (< 8) * and address is not aligned to 0xFF * TODO(alashkin): understand why and remove `0 &&` from `if` */ return spi_flash_read(addr, (u32_t *) dst, size); } else { return esp_spiffs_readwrite(addr, size, dst, 0); } }