static void handle_udp_data_packet( struct socket_address src, struct socket_address dst, unsigned char *payload, int payload_len ){ size_t which; switch(dst.port){ case USRP2_UDP_DSP0_PORT: which = 0; dsp0_dst_port = src.port; break; case USRP2_UDP_DSP1_PORT: which = 2; dsp1_dst_port = src.port; break; case USRP2_UDP_ERR0_PORT: which = 1; err0_dst_port = src.port; break; default: return; } eth_mac_addr_t eth_mac_host; arp_cache_lookup_mac(&src.addr, ð_mac_host); setup_framer(eth_mac_host, *ethernet_mac_addr(), src, dst, which); }
void start_rx_streaming_cmd(const u2_mac_addr_t *host, op_start_rx_streaming_t *p) { host_mac_addr = *host; // remember who we're sending to /* * Construct ethernet header and word0 and preload into two buffers */ u2_eth_packet_t pkt; memset(&pkt, 0, sizeof(pkt)); pkt.ehdr.dst = *host; pkt.ehdr.src = *ethernet_mac_addr(); pkt.ehdr.ethertype = U2_ETHERTYPE; u2p_set_word0(&pkt.fixed, 0, 0); // DSP RX will fill in timestamp memcpy_wa(buffer_ram(DSP_RX_BUF_0), &pkt, sizeof(pkt)); memcpy_wa(buffer_ram(DSP_RX_BUF_1), &pkt, sizeof(pkt)); if (FW_SETS_SEQNO) fw_seqno = 0; streaming_items_per_frame = p->items_per_frame; restart_streaming(); }
int main(void) { u2_init(); putstr("\nFactory Test, Board Rev 3.0\n"); bool ok = true; unsigned char maj = HW_REV_MAJOR; unsigned char min = HW_REV_MINOR; ok = eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_MSB, &maj, 1); ok &= eeprom_write(I2C_ADDR_MBOARD, MBOARD_REV_LSB, &min, 1); putstr("\nset_hw_rev\n"); if (ok) printf("OK: set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR); else { printf("FAILED to set h/w rev to %d.%d\n", HW_REV_MAJOR, HW_REV_MINOR); hal_finish(); return 0; } if(test_sd()) puts("SD OK\n"); else { puts("SD FAIL\n"); //hal_finish(); //return 0; } if(test_ram()) puts("RAM OK\n"); else { puts("RAM FAIL\n"); hal_finish(); return 0; } print_mac_addr(ethernet_mac_addr()->addr); newline(); clocks_mimo_config(MC_WE_LOCK_TO_SMA); while (!clocks_lock_detect()) { puts("No Lock"); mdelay(1000); } puts("Clock Locked\n"); }
int main(void) { u2_init(); putstr("\nFactory Test\n"); print_mac_addr(ethernet_mac_addr()->addr); newline(); if(test_sd()) puts("SD OK\n"); else { puts("SD FAIL\n"); // hal_finish(); //return 0; } if(test_ram()) puts("RAM OK\n"); else { puts("RAM FAIL\n"); hal_finish(); return 0; } print_mac_addr(ethernet_mac_addr()->addr); newline(); output_regs->led_src = 0x7; // make bottom 3 controlled by HW ethernet_register_link_changed_callback(link_changed_callback); ethernet_init(); clocks_enable_tx_dboard(true,1); clocks_mimo_config(MC_WE_LOCK_TO_SMA); #if 0 // make bit 15 of Tx gpio's be a s/w output hal_gpio_set_sel(GPIO_TX_BANK, 15, 's'); hal_gpio_set_ddr(GPIO_TX_BANK, 0x8000, 0x8000); #endif output_regs->debug_mux_ctrl = 1; #if 0 hal_gpio_set_sels(GPIO_TX_BANK, "1111111111111111"); hal_gpio_set_sels(GPIO_RX_BANK, "1111111111111111"); hal_gpio_set_ddr(GPIO_TX_BANK, 0xffff, 0xffff); hal_gpio_set_ddr(GPIO_RX_BANK, 0xffff, 0xffff); #endif // initialize double buffering state machine for ethernet -> DSP Tx dbsm_init(&dsp_tx_sm, DSP_TX_BUF_0, &dsp_tx_recv_args, &dsp_tx_send_args, eth_pkt_inspector); // initialize double buffering state machine for DSP RX -> Ethernet if (FW_SETS_SEQNO){ dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0, &dsp_rx_recv_args, &dsp_rx_send_args, fw_sets_seqno_inspector); } else { dbsm_init(&dsp_rx_sm, DSP_RX_BUF_0, &dsp_rx_recv_args, &dsp_rx_send_args, dbsm_nop_inspector); } // tell app_common that this dbsm could be sending to the ethernet ac_could_be_sending_to_eth = &dsp_rx_sm; // program tx registers setup_tx(); // kick off the state machine dbsm_start(&dsp_tx_sm); //int which = 0; while(1){ // hal_gpio_write(GPIO_TX_BANK, which, 0x8000); // which ^= 0x8000; buffer_irq_handler(0); int pending = pic_regs->pending; // poll for under or overrun if (pending & PIC_UNDERRUN_INT){ dbsm_handle_tx_underrun(&dsp_tx_sm); pic_regs->pending = PIC_UNDERRUN_INT; // clear interrupt putchar('U'); } if (pending & PIC_OVERRUN_INT){ dbsm_handle_rx_overrun(&dsp_rx_sm); pic_regs->pending = PIC_OVERRUN_INT; // clear pending interrupt // FIXME Figure out how to handle this robustly. // Any buffers that are emptying should be allowed to drain... if (streaming_p){ // restart_streaming(); // FIXME report error } else { // FIXME report error } putchar('O'); } } }
int main(void) { u2_init(); #ifdef BOOTLOADER putstr("\nUSRP N210 UDP bootloader\n"); #else putstr("\nTxRx-UHD-ZPU\n"); #endif printf("FPGA compatibility number: %d\n", USRP2_FPGA_COMPAT_NUM); printf("Firmware compatibility number: %d\n", USRP2_FW_COMPAT_NUM); #ifdef BOOTLOADER //load the production FPGA image or firmware if appropriate do_the_bootload_thing(); //if we get here we've fallen through to safe firmware set_default_mac_addr(); set_default_ip_addr(); #endif print_mac_addr(ethernet_mac_addr()); newline(); print_ip_addr(get_ip_addr()); newline(); //1) register the addresses into the network stack register_addrs(ethernet_mac_addr(), get_ip_addr()); pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_DSP0_PORT); //2) register callbacks for udp ports we service init_udp_listeners(); register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet); register_udp_listener(USRP2_UDP_DSP0_PORT, handle_udp_data_packet); register_udp_listener(USRP2_UDP_ERR0_PORT, handle_udp_data_packet); register_udp_listener(USRP2_UDP_DSP1_PORT, handle_udp_data_packet); #ifdef USRP2P register_udp_listener(USRP2_UDP_UPDATE_PORT, handle_udp_fw_update_packet); #endif //3) set the routing mode to slave to set defaults pkt_ctrl_set_routing_mode(PKT_CTRL_ROUTING_MODE_SLAVE); //4) setup ethernet hardware to bring the link up ethernet_register_link_changed_callback(link_changed_callback); ethernet_init(); while(true){ size_t num_lines; void *buff = pkt_ctrl_claim_incoming_buffer(&num_lines); if (buff != NULL){ handle_inp_packet((uint32_t *)buff, num_lines); pkt_ctrl_release_incoming_buffer(); } pic_interrupt_handler(); int pending = pic_regs->pending; // poll for under or overrun if (pending & PIC_UNDERRUN_INT){ pic_regs->pending = PIC_UNDERRUN_INT; // clear interrupt putchar('U'); } if (pending & PIC_OVERRUN_INT){ pic_regs->pending = PIC_OVERRUN_INT; // clear interrupt putchar('O'); } } }