static int
btn_intr(void *arg)
{
struct btn_obio_softc *sc = (void *)arg;
device_t self = sc->sc_dev;
int status;
int i;
status = (int8_t)_reg_read_1(LANDISK_BTNSTAT);
if (status == -1) {
return (0);
}
status = ~status;
if (status & BTN_ALL_BIT) {
if (status & BTN_RESET_BIT) {
if (sc->sc_mask & BTN_RESET_BIT) {
extintr_disable(sc->sc_ih);
#if NPWRSW_OBIO > 0
extintr_disable_by_num(LANDISK_INTR_PWRSW);
#endif
sysmon_task_queue_sched(0,
btn_sysmon_pressed_event, sc);
return (1);
} else {
aprint_normal_dev(self,
"reset button pressed\n");
}
}
for (i = 0; i < NBUTTON; i++) {
uint8_t mask = btnlist[i].mask;
int rv = 0;
if (status & mask) {
if (sc->sc_mask & mask) {
sysmon_task_queue_sched(1,
btn_pressed_event,
&sc->sc_bev[btnlist[i].idx]);
} else {
aprint_normal_dev(self,
"%s button pressed\n",
btnlist[i].name);
}
rv = 1;
}
if (rv != 0) {
extintr_disable(sc->sc_ih);
callout_schedule(&sc->sc_guard_ch, BTN_TIMEOUT);
}
}
return (1);
}
return (0);
}
void
gt_watchdog_init(struct gt_softc *gt)
{
u_int32_t r;
unsigned int omsr;
omsr = extintr_disable();
printf("%s: watchdog", gt->gt_dev.dv_xname);
/*
* handle case where firmware started watchdog
*/
r = gt_read(gt, GT_WDOG_Config);
printf(" status %#x,%#x:",
r, gt_read(gt, GT_WDOG_Value));
if ((r & 0x80000000) != 0) {
gt_watchdog_sc = gt; /* enabled */
gt_watchdog_state = 1;
printf(" firmware-enabled\n");
gt_watchdog_service();
return;
} else {
printf(" firmware-disabled\n");
}
extintr_restore(omsr);
}
void
gt_watchdog_init(struct gt_softc *gt)
{
u_int32_t mpp_watchdog = GT_MPP_WATCHDOG; /* from config */
u_int32_t r;
u_int32_t cfgbits;
u_int32_t mppbits;
u_int32_t mppmask=0;
u_int32_t regoff;
unsigned int omsr;
printf("%s: watchdog", gt->gt_dev.dv_xname);
if (mpp_watchdog == 0) {
printf(" not configured\n");
return;
}
#if 0
if (afw_wdog_ctl == 1) {
printf(" admin disabled\n");
return;
}
#endif
omsr = extintr_disable();
/*
* if firmware started watchdog, we disable and start
* from scratch to get it in a known state.
*
* on GT-64260A we always see 0xffffffff
* in both the GT_WDOG_Config_Enb and GT_WDOG_Value regsiters.
* Use AFW-supplied flag to determine run state.
*/
r = gt_read(gt, GT_WDOG_Config);
if (r != ~0) {
if ((r & GT_WDOG_Config_Enb) != 0) {
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
}
} else {
#if 0
if (afw_wdog_state == 1) {
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
}
#endif
}
/*
* "the watchdog timer can be activated only after
* configuring two MPP pins to act as WDE and WDNMI"
*/
mppbits = 0;
cfgbits = 0x3;
for (regoff = GT_MPP_Control0; regoff <= GT_MPP_Control3; regoff += 4) {
if ((mpp_watchdog & cfgbits) == cfgbits) {
mppbits = 0x99;
mppmask = 0xff;
break;
}
cfgbits <<= 2;
if ((mpp_watchdog & cfgbits) == cfgbits) {
mppbits = 0x9900;
mppmask = 0xff00;
break;
}
cfgbits <<= 6; /* skip unqualified bits */
}
if (mppbits == 0) {
printf(" config error\n");
extintr_restore(omsr);
return;
}
r = gt_read(gt, regoff);
r &= ~mppmask;
r |= mppbits;
gt_write(gt, regoff, r);
printf(" mpp %#x %#x", regoff, mppbits);
gt_write(gt, GT_WDOG_Value, GT_WDOG_NMI_DFLT);
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1a | GT_WDOG_Preset_DFLT));
gt_write(gt, GT_WDOG_Config,
(GT_WDOG_Config_Ctl1b | GT_WDOG_Preset_DFLT));
r = gt_read(gt, GT_WDOG_Config),
printf(" status %#x,%#x: %s",
r, gt_read(gt, GT_WDOG_Value),
((r & GT_WDOG_Config_Enb) != 0) ? "enabled" : "botch");
if ((r & GT_WDOG_Config_Enb) != 0) {
register_t hid0;
gt_watchdog_sc = gt; /* enabled */
gt_watchdog_state = 1;
/*
* configure EMCP in HID0 in case it's not already set
*/
__asm __volatile("sync":::"memory");
hid0 = mfspr(SPR_HID0);
if ((hid0 & HID0_EMCP) == 0) {
hid0 |= HID0_EMCP;
__asm __volatile("sync":::"memory"); mtspr(SPR_HID0, hid0);
__asm __volatile("sync":::"memory"); hid0 = mfspr(SPR_HID0);
printf(", EMCP set");
}
