int __init arch_clocksource_init(void) { int rc; struct vmm_devtree_node *node; /* Map timer0 registers */ node = vmm_devtree_getnode(VMM_DEVTREE_PATH_SEPARATOR_STRING "mct"); if (!node) { rc = VMM_EFAIL; goto skip_mct_timer_init; } rc = vmm_devtree_clock_frequency(node, &mct_clk_rate); if (rc) { goto skip_mct_timer_init; } if (!mct_timer_base) { rc = vmm_devtree_regmap(node, &mct_timer_base, 0); if (rc) { return rc; } } /* Initialize mct as clocksource */ rc = exynos4_clocksource_init(mct_timer_base, node->name, 300, mct_clk_rate); if (rc) { return rc; } skip_mct_timer_init: return rc; }
static void __init exynos4_timer_init(void) { if (soc_is_exynos4210()) mct_int_type = MCT_INT_SPI; else mct_int_type = MCT_INT_PPI; exynos4_timer_resources(); exynos4_clocksource_init(); exynos4_clockevent_init(); }
static void __init exynos4_timer_init(void) { exynos4_timer_resources(); exynos4_clocksource_init(); exynos4_clockevent_init(); }