static int exynos5_check_usb_op(void)
{
u32 hostphy_ctrl0, otgphy_sys;
u32 op = 1;
unsigned long flags;
int ret;
ret = clk_enable(phy_clk);
if (ret)
return 0;
local_irq_save(flags);
/* Check USB 3.0 DRD power */
if (exynos5_usb_phy30_is_on()) {
op = 1;
goto done;
}
/*If USB Device is power on, */
if (exynos_usb_device_phy_is_on()) {
op = 1;
goto done;
} else if (!exynos5_usb_host_phy20_is_on()) {
op = 0;
goto done;
}
hostphy_ctrl0 = readl(EXYNOS5_PHY_HOST_CTRL0);
if (hostphy_ctrl0 & HOST_CTRL0_FORCESUSPEND) {
/* unset to normal of Host */
hostphy_ctrl0 |= (HOST_CTRL0_SIDDQ);
writel(hostphy_ctrl0, EXYNOS5_PHY_HOST_CTRL0);
/* unset to normal of Device */
otgphy_sys = readl(EXYNOS5_PHY_OTG_SYS);
otgphy_sys |= OTG_SYS_SIDDQ_UOTG;
writel(otgphy_sys, EXYNOS5_PHY_OTG_SYS);
exynos_usb_phy_control(USB_PHY1,
PHY_DISABLE);
op = 0;
usb_phy_control.lpa_entered = 1;
}
done:
local_irq_restore(flags);
clk_disable(phy_clk);
return op;
}
int exynos4_check_usb_op(void)
{
u32 phypwr;
u32 op = 1;
unsigned long flags;
int ret;
ret = clk_enable(phy_clk);
if (ret)
return 0;
local_irq_save(flags);
phypwr = readl(EXYNOS4_PHYPWR);
/*If USB Device is power on, */
if (exynos_usb_device_phy_is_on()) {
op = 1;
goto done;
} else if (!exynos4_usb_host_phy_is_on()) {
op = 0;
goto done;
}
/*If USB Device & Host is suspended, */
if (soc_is_exynos4210()) {
if (phypwr & (PHY1_STD_FORCE_SUSPEND
| EXYNOS4210_HSIC0_FORCE_SUSPEND
| EXYNOS4210_HSIC1_FORCE_SUSPEND)) {
#if defined(CONFIG_LINK_DEVICE_HSIC) || defined(CONFIG_LINK_DEVICE_USB)
/* HSIC LPA: LPA USB phy retention reume call the usb
* reset resume, so we should let CP to HSIC L3 mode. */
set_hsic_lpa_states(STATE_HSIC_LPA_ENTER);
#endif
writel(readl(EXYNOS4_PHYPWR)
| PHY1_STD_ANALOG_POWERDOWN,
EXYNOS4_PHYPWR);
writel(PHY_DISABLE, S5P_USBHOST_PHY_CONTROL);
op = 0;
}
} else {
if (phypwr & (PHY1_STD_FORCE_SUSPEND
| EXYNOS4212_HSIC0_FORCE_SUSPEND
| EXYNOS4212_HSIC1_FORCE_SUSPEND)) {
#if defined(CONFIG_LINK_DEVICE_HSIC) || defined(CONFIG_LINK_DEVICE_USB)
/* HSIC LPA: LPA USB phy retention reume call the usb
* reset resume, so we should let CP to HSIC L3 mode. */
set_hsic_lpa_states(STATE_HSIC_LPA_ENTER);
#endif
/* unset to normal of Host */
writel(readl(EXYNOS4_PHYPWR)
| PHY1_STD_ANALOG_POWERDOWN
| EXYNOS4212_HSIC0_ANALOG_POWERDOWN
| EXYNOS4212_HSIC1_ANALOG_POWERDOWN,
EXYNOS4_PHYPWR);
/* unset to normal of Device */
writel((readl(EXYNOS4_PHYPWR) | PHY0_NORMAL_MASK),
EXYNOS4_PHYPWR);
exynos_usb_phy_control(USB_PHY
| USB_PHY_HSIC0
| USB_PHY_HSIC1,
PHY_DISABLE);
op = 0;
usb_phy_control.lpa_entered = 1;
}
}
done:
local_irq_restore(flags);
clk_disable(phy_clk);
return op;
}
static int exynos4_check_usb_op(void)
{
u32 phypwr;
u32 op = 1;
unsigned long flags;
int ret;
ret = clk_enable(phy_clk);
if (ret)
return 0;
local_irq_save(flags);
phypwr = readl(EXYNOS4_PHYPWR);
/*If USB Device is power on, */
if (exynos_usb_device_phy_is_on()) {
op = 1;
goto done;
} else if (!exynos4_usb_host_phy_is_on()) {
op = 0;
goto done;
}
/*If USB Device & Host is suspended, */
if (soc_is_exynos4210()) {
if (phypwr & (PHY1_STD_FORCE_SUSPEND
| EXYNOS4210_HSIC0_FORCE_SUSPEND
| EXYNOS4210_HSIC1_FORCE_SUSPEND)) {
writel(readl(EXYNOS4_PHYPWR)
| PHY1_STD_ANALOG_POWERDOWN,
EXYNOS4_PHYPWR);
writel(PHY_DISABLE, S5P_USBHOST_PHY_CONTROL);
op = 0;
}
} else {
if (phypwr & (PHY1_STD_FORCE_SUSPEND
| EXYNOS4212_HSIC0_FORCE_SUSPEND
| EXYNOS4212_HSIC1_FORCE_SUSPEND)) {
/* unset to normal of Host */
writel(readl(EXYNOS4_PHYPWR)
| PHY1_STD_ANALOG_POWERDOWN
| EXYNOS4212_HSIC0_ANALOG_POWERDOWN
| EXYNOS4212_HSIC1_ANALOG_POWERDOWN,
EXYNOS4_PHYPWR);
/* unset to normal of Device */
writel((readl(EXYNOS4_PHYPWR) | PHY0_NORMAL_MASK),
EXYNOS4_PHYPWR);
exynos_usb_phy_control(USB_PHY
| USB_PHY_HSIC0
| USB_PHY_HSIC1,
PHY_DISABLE);
op = 0;
usb_phy_control.lpa_entered = 1;
}
}
done:
local_irq_restore(flags);
clk_disable(phy_clk);
return op;
}
