int arch_fixup_fdt(void *blob) { bd_t *bd = gd->bd; int bank, ret; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { start[bank] = bd->bi_dram[bank].start; size[bank] = bd->bi_dram[bank].size; #ifdef CONFIG_ARMV7_NONSEC ret = armv7_apply_memory_carveout(&start[bank], &size[bank]); if (ret) return ret; #endif } ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); #ifdef CONFIG_ARMV7_NONSEC if (ret) return ret; ret = psci_update_dt(blob); #endif return ret; }
int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; ft_cpu_setup(blob, bd); /* fixup DT for the two GPP DDR banks */ base[0] = gd->bd->bi_dram[0].start; size[0] = gd->bd->bi_dram[0].size; base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size; #ifdef CONFIG_RESV_RAM /* reduce size if reserved memory is within this bank */ if (gd->arch.resv_ram >= base[0] && gd->arch.resv_ram < base[0] + size[0]) size[0] = gd->arch.resv_ram - base[0]; else if (gd->arch.resv_ram >= base[1] && gd->arch.resv_ram < base[1] + size[1]) size[1] = gd->arch.resv_ram - base[1]; #endif fdt_fixup_memory_banks(blob, base, size, 2); fdt_fsl_mc_fixup_iommu_map_entry(blob); #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD) fdt_fixup_board_enet(blob); #endif return 0; }
int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; u8 reg; /* fixup DT for the two DDR banks */ base[0] = gd->bd->bi_dram[0].start; size[0] = gd->bd->bi_dram[0].size; base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_ethernet(blob); fdt_fixup_board_enet(blob); #endif reg = QIXIS_READ(brdcfg[0]); reg = (reg & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; /* Disable IFC if QSPI is enabled */ if (reg == 0xF) do_fixup_by_compat(blob, "fsl,ifc", "status", "disabled", 8 + 1, 1); return 0; }
int ft_board_setup(void *blob, bd_t *bd) { #ifdef CONFIG_FSL_MC_ENET int err; #endif u64 base[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; ft_cpu_setup(blob, bd); /* fixup DT for the two GPP DDR banks */ base[0] = gd->bd->bi_dram[0].start; size[0] = gd->bd->bi_dram[0].size; base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); #ifdef CONFIG_FSL_MC_ENET fdt_fixup_board_enet(blob); err = fsl_mc_ldpaa_exit(bd); if (err) return err; #endif return 0; }
int ft_board_setup(void *blob, bd_t *bd) { int lpae; char *env; char *endp; int nbanks; u64 size[2]; u64 start[2]; u32 ddr3a_size; env = env_get("mem_lpae"); lpae = env && simple_strtol(env, NULL, 0); ddr3a_size = 0; if (lpae) { ddr3a_size = ddr3_get_size(); if ((ddr3a_size != 8) && (ddr3a_size != 4)) ddr3a_size = 0; } nbanks = 1; start[0] = bd->bi_dram[0].start; size[0] = bd->bi_dram[0].size; /* adjust memory start address for LPAE */ if (lpae) { start[0] -= CONFIG_SYS_SDRAM_BASE; start[0] += CONFIG_SYS_LPAE_SDRAM_BASE; } if ((size[0] == 0x80000000) && (ddr3a_size != 0)) { size[1] = ((u64)ddr3a_size - 2) << 30; start[1] = 0x880000000; nbanks++; } /* reserve memory at start of bank */ env = env_get("mem_reserve_head"); if (env) { start[0] += ustrtoul(env, &endp, 0); size[0] -= ustrtoul(env, &endp, 0); } env = env_get("mem_reserve"); if (env) size[0] -= ustrtoul(env, &endp, 0); fdt_fixup_memory_banks(blob, start, size, nbanks); return 0; }
static int fixup_memory_node(void *blob) { bd_t *bd = gd->bd; int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { start[bank] = bd->bi_dram[bank].start; size[bank] = bd->bi_dram[bank].size; } return fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); }
int msm_fixup_memory(void *blob) { u64 bank_start[MEMORY_BANKS_MAX]; u64 bank_size[MEMORY_BANKS_MAX]; size_t size; int i; int count = 0; struct udevice *smem; int ret; struct smem_ram_ptable *ram_ptable; struct smem_ram_ptn *p; ret = uclass_get_device_by_name(UCLASS_SMEM, "smem", &smem); if (ret < 0) { printf("Failed to find SMEM node. Check device tree\n"); return 0; } ram_ptable = smem_get(smem, -1, SMEM_USABLE_RAM_PARTITION_TABLE, &size); if (!ram_ptable) { printf("Failed to find SMEM partition.\n"); return -ENODEV; } /* Check validy of RAM */ for (i = 0; i < RAM_NUM_PART_ENTRIES; i++) { p = &ram_ptable->parts[i]; if (p->category == CATEGORY_SDRAM && p->type == TYPE_SYSMEM) { bank_start[count] = p->start; bank_size[count] = p->size; debug("Detected memory bank %u: start: 0x%llx size: 0x%llx\n", count, p->start, p->size); count++; } } if (!count) { printf("Failed to detect any memory bank\n"); return -ENODEV; } ret = fdt_fixup_memory_banks(blob, bank_start, bank_size, count); if (ret) return ret; return 0; }
int arch_fixup_fdt(void *blob) { __maybe_unused int ret = 0; #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT) bd_t *bd = gd->bd; int bank; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { start[bank] = bd->bi_dram[bank].start; size[bank] = bd->bi_dram[bank].size; #ifdef CONFIG_ARMV7_NONSEC ret = armv7_apply_memory_carveout(&start[bank], &size[bank]); if (ret) return ret; #endif } #ifdef CONFIG_OF_LIBFDT ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); if (ret) return ret; #endif #ifdef CONFIG_ARMV8_SPIN_TABLE ret = spin_table_update_dt(blob); if (ret) return ret; #endif #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI) || \ defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI) ret = psci_update_dt(blob); if (ret) return ret; #endif #endif #ifdef CONFIG_FMAN_ENET ret = fdt_update_ethernet_dt(blob); if (ret) return ret; #endif return 0; }
int ft_board_setup(void *blob, bd_t *bd) { int nodeoffset; nodeoffset = fdt_path_offset(blob, "/factory-settings"); if (nodeoffset < 0) { puts("set bootloader version 'factory-settings' not in dtb!\n"); return -1; } if (fdt_setprop(blob, nodeoffset, "bl-version", PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) { puts("set bootloader version 'bl-version' prop. not in dtb!\n"); return -1; } /* * if no simplefb is requested through environment, we don't set up * one, instead we turn off backlight. */ if (env_get_ulong("simplefb", 10, 0) == 0) { lcdbacklight(0); return 0; } /* Setup simplefb devicetree node, also adapt memory-node, * upper limit for kernel e.g. linux is memtop-framebuffer alligned * to a full megabyte. */ u64 start = gd->bd->bi_dram[0].start; u64 size = (gd->fb_base - start) & ~0xFFFFF; int rc = fdt_fixup_memory_banks(blob, &start, &size, 1); if (rc) { puts("cannot setup simplefb: Error reserving memory!\n"); return rc; } rc = lcd_dt_simplefb_enable_existing_node(blob); if (rc) { puts("cannot setup simplefb: error enabling simplefb node!\n"); return rc; } return 0; }
int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; /* fixup DT for the two DDR banks */ base[0] = gd->bd->bi_dram[0].start; size[0] = gd->bd->bi_dram[0].size; base[1] = gd->bd->bi_dram[1].start; size[1] = gd->bd->bi_dram[1].size; fdt_fixup_memory_banks(blob, base, size, 2); ft_cpu_setup(blob, bd); #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_ethernet(blob); #endif return 0; }
int arch_fixup_fdt(void *blob) { bd_t *bd = gd->bd; int bank, ret; u64 start[CONFIG_NR_DRAM_BANKS]; u64 size[CONFIG_NR_DRAM_BANKS]; for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { start[bank] = bd->bi_dram[bank].start; size[bank] = bd->bi_dram[bank].size; } ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS); #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) if (ret) return ret; ret = armv7_update_dt(blob); #endif return ret; }
/* * For newer kernel that boot with device tree (3.14+), all of memory is * described in the /memory node, including areas that the kernel should not be * touching. * * By default, u-boot will walk the dram bank info and populate the /memory * node; here, overwrite this behavior so we describe all of memory instead. */ void ft_board_setup(void *blob, bd_t *bd) { u64 memory_start = CONFIG_SYS_SDRAM_BASE; u64 memory_size = gboard_param->ddr_size; ipq_smem_flash_info_t *sfi = &ipq_smem_flash_info; char *mtdparts = NULL; char parts_str[MTDPARTS_BUF_LEN]; struct node_info nodes[] = { { "qcom,qcom_nand", MTD_DEV_TYPE_NAND, 0 }, { "s25fl256s1", MTD_DEV_TYPE_NAND, 1 }, { NULL, 0, -1 }, }; if (sfi->flash_type == SMEM_BOOT_NAND_FLASH) { mtdparts = "mtdparts=nand0"; } else if (sfi->flash_type == SMEM_BOOT_SPI_FLASH) { ipq_get_part_details(); if (sfi->rootfs.offset == 0xBAD0FF5E ) { sprintf(parts_str, "mtdparts=nand0:0x%x@0(rootfs);nand1", IPQ_NAND_ROOTFS_SIZE); mtdparts = parts_str; } else { mtdparts = "mtdparts=nand1"; } } mtdparts = ipq_smem_part_to_mtdparts(mtdparts); fdt_fixup_memory_banks(blob, &memory_start, &memory_size, 1); if(mtdparts != NULL) printf("mtdparts = %s\n", mtdparts); setenv("mtdids", "nand0=nand0,nand1=nand1"); setenv("mtdparts", mtdparts); ipq_fdt_fixup_mtdparts(blob, nodes); }
int fdt_fixup_memory(void *blob, u64 start, u64 size) { return fdt_fixup_memory_banks(blob, &start, &size, 1); }
void arm_cmd_start_linux(int argc, char **argv) { u64 kernel_addr, fdt_addr; u64 initrd_addr, initrd_size; int err; char cfg_str[10]; u64 meminfo[2]; if (argc != 5) { arm_puts ("start_linux: must provide <kernel_addr>, <initrd_addr>, <initrd_size> and <fdt_addr>\n"); return; } /* Parse the arguments from command line */ kernel_addr = arm_hexstr2ulonglong(argv[1]); initrd_addr = arm_hexstr2ulonglong(argv[2]); initrd_size = arm_hexstr2ulonglong(argv[3]); fdt_addr = arm_hexstr2ulonglong(argv[4]); meminfo[0] = arm_board_ram_start(); meminfo[1] = arm_board_ram_size(); /* Fillup/fixup the fdt blob with following: * - initrd start, end * - kernel cmd line * - number of cpus */ if ((err = fdt_fixup_memory_banks((void *)fdt_addr, (&meminfo[0]), (&meminfo[1]), 1))) { arm_printf("%s: fdt_fixup_memory_banks() failed: %s\n", __func__, fdt_strerror(err)); return; } sprintf(cfg_str, " mem=%dM maxcpus=%d", (int)(meminfo[1] >> 20), CONFIG_NR_CPUS); arm_strcat(linux_cmdline, cfg_str); if ((err = fdt_chosen((void *)fdt_addr, 1))) { arm_printf("%s: fdt_chosen() failed: %s\n", __func__, fdt_strerror(err)); return; } if ((err = fdt_initrd((void *)fdt_addr, initrd_addr, initrd_addr + initrd_size, 1))) { arm_printf("%s: fdt_initrd() failed: %s\n", __func__, fdt_strerror(err)); return; } /* Disable interrupts and timer */ arm_board_timer_disable(); arm_irq_disable(); arm_mmu_cleanup(); /* Jump to Linux Kernel * r0 -> dtb address */ arm_puts("Jumping into linux ...\n"); ((linux_entry_t)kernel_addr)(fdt_addr); /* We should never reach here */ while (1); return; }