static void labx_nios2_init(QEMUMachineInitArgs *args)
{
MemoryRegion *address_space_mem = get_system_memory();
int kernel_size;
int fdt_size;
void *fdt = get_device_tree(&fdt_size);
hwaddr ddr_base = get_dram_base(fdt);
MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
MemoryRegion *phys_ram_alias = g_new(MemoryRegion, 1);
/* Attach emulated BRAM through the LMB. LMB size is not specified
in the device-tree but there must be one to hold the vector table. */
memory_region_init_ram(phys_lmb_bram, "nios2.lmb_bram", LMB_BRAM_SIZE);
vmstate_register_ram_global(phys_lmb_bram);
memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
memory_region_init_ram(phys_ram, "nios2.ram", ram_size);
vmstate_register_ram_global(phys_ram);
memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
memory_region_init_alias(phys_ram_alias, "nios2.ram.mirror",
phys_ram, 0, ram_size);
memory_region_add_subregion(address_space_mem, ddr_base + 0xc0000000,
phys_ram_alias);
/* Create cpus listed in the device-tree */
add_to_force_table(cpus_probe, "cpu-probe", NULL);
/* Create other devices listed in the device-tree */
fdt_init_destroy_fdti(fdt_generic_create_machine(fdt, NULL));
if (args->kernel_filename) {
uint64_t entry = 0, low = 0, high = 0;
uint32_t base32 = 0;
/* Boots a kernel elf binary. */
kernel_size = load_elf(args->kernel_filename, NULL, NULL,
&entry, &low, &high,
0, ELF_MACHINE, 0);
base32 = entry;
if (base32 == 0xc0000000) {
kernel_size = load_elf(args->kernel_filename, translate_kernel_address,
NULL, &entry, NULL, NULL,
0, ELF_MACHINE, 0);
}
/* Always boot into physical ram. */
boot_info.bootstrap_pc = ddr_base + 0xc0000000 + (entry & 0x07ffffff);
/* If it wasn't an ELF image, try an u-boot image. */
if (kernel_size < 0) {
hwaddr uentry, loadaddr;
kernel_size = load_uimage(args->kernel_filename, &uentry, &loadaddr, 0);
boot_info.bootstrap_pc = uentry;
high = (loadaddr + kernel_size + 3) & ~3;
}
/* Not an ELF image nor an u-boot image, try a RAW image. */
if (kernel_size < 0) {
kernel_size = load_image_targphys(args->kernel_filename, ddr_base,
ram_size);
boot_info.bootstrap_pc = ddr_base;
high = (ddr_base + kernel_size + 3) & ~3;
}
if (args->initrd_filename) {
uint32_t initrd_base = 0x88c00000;
uint32_t initrd_size =
load_image_targphys(args->initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size <= 0) {
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
args->initrd_filename);
exit(1);
}
boot_info.initrd = initrd_base;
} else {
boot_info.initrd = 0x00000000;
}
boot_info.cmdline = high + 4096;
if (args->kernel_cmdline && strlen(args->kernel_cmdline)) {
pstrcpy_targphys("cmdline", boot_info.cmdline, 256, args->kernel_cmdline);
}
/* Provide a device-tree. */
boot_info.fdt = boot_info.cmdline + 4096;
labx_load_device_tree(boot_info.fdt, ram_size,
0, 0,
args->kernel_cmdline);
}
}
static void
microblaze_generic_fdt_init(MachineState *machine)
{
CPUState *cpu;
ram_addr_t ram_kernel_base = 0, ram_kernel_size = 0;
void *fdt = NULL;
const char *dtb_arg, *hw_dtb_arg;
QemuOpts *machine_opts;
int fdt_size;
/* for memory node */
char node_path[DT_PATH_LENGTH];
FDTMachineInfo *fdti;
MemoryRegion *main_mem;
/* For DMA node */
char dma_path[DT_PATH_LENGTH] = { 0 };
uint32_t memory_phandle;
/* For Ethernet nodes */
char **eth_paths;
char *phy_path;
char *mdio_path;
uint32_t n_eth;
uint32_t prop_val;
machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
if (!machine_opts) {
goto no_dtb_arg;
}
dtb_arg = qemu_opt_get(machine_opts, "dtb");
hw_dtb_arg = qemu_opt_get(machine_opts, "hw-dtb");
if (!dtb_arg && !hw_dtb_arg) {
goto no_dtb_arg;
}
/* If the user only provided a -dtb, use it as the hw description. */
if (!hw_dtb_arg) {
hw_dtb_arg = dtb_arg;
}
fdt = load_device_tree(hw_dtb_arg, &fdt_size);
if (!fdt) {
hw_error("Error: Unable to load Device Tree %s\n", hw_dtb_arg);
return;
}
if (IS_PETALINUX_MACHINE) {
/* Mark the simple-bus as incompatible as it breaks the Microblaze
* PetaLinux boot
*/
add_to_compat_table(NULL, "compatible:simple-bus", NULL);
}
/* find memory node or add new one if needed */
while (qemu_fdt_get_node_by_name(fdt, node_path, "memory")) {
qemu_fdt_add_subnode(fdt, "/memory@0");
qemu_fdt_setprop_cells(fdt, "/memory@0", "reg", 0, machine->ram_size);
}
if (!qemu_fdt_getprop(fdt, "/memory", "compatible", NULL, 0, NULL)) {
qemu_fdt_setprop_string(fdt, "/memory", "compatible",
"qemu:memory-region");
qemu_fdt_setprop_cells(fdt, "/memory", "qemu,ram", 1);
}
if (IS_PETALINUX_MACHINE) {
/* If using a *-plnx machine, the AXI DMA memory links are not included
* in the DTB by default. To avoid seg faults, add the links in here if
* they have not already been added by the user
*/
qemu_fdt_get_node_by_name(fdt, dma_path, "dma");
if (strcmp(dma_path, "") != 0) {
memory_phandle = qemu_fdt_check_phandle(fdt, node_path);
if (!memory_phandle) {
memory_phandle = qemu_fdt_alloc_phandle(fdt);
qemu_fdt_setprop_cells(fdt, "/memory", "linux,phandle",
memory_phandle);
qemu_fdt_setprop_cells(fdt, "/memory", "phandle",
memory_phandle);
}
if (!qemu_fdt_getprop(fdt, dma_path, "sg", NULL, 0, NULL)) {
qemu_fdt_setprop_phandle(fdt, dma_path, "sg", node_path);
}
if (!qemu_fdt_getprop(fdt, dma_path, "s2mm", NULL, 0, NULL)) {
qemu_fdt_setprop_phandle(fdt, dma_path, "s2mm", node_path);
}
if (!qemu_fdt_getprop(fdt, dma_path, "mm2s", NULL, 0, NULL)) {
qemu_fdt_setprop_phandle(fdt, dma_path, "mm2s", node_path);
}
}
/* Copy phyaddr value from phy node reg property */
n_eth = qemu_fdt_get_n_nodes_by_name(fdt, ð_paths, "ethernet");
while (n_eth--) {
mdio_path = qemu_fdt_get_child_by_name(fdt, eth_paths[n_eth],
"mdio");
if (mdio_path) {
phy_path = qemu_fdt_get_child_by_name(fdt, mdio_path,
"phy");
if (phy_path) {
prop_val = qemu_fdt_getprop_cell(fdt, phy_path, "reg", NULL, 0,
NULL, &error_abort);
qemu_fdt_setprop_cell(fdt, eth_paths[n_eth], "xlnx,phyaddr",
prop_val);
g_free(phy_path);
} else {
qemu_log_mask(LOG_GUEST_ERROR, "phy not found in %s",
mdio_path);
}
g_free(mdio_path);
}
g_free(eth_paths[n_eth]);
}
g_free(eth_paths);
}
/* Instantiate peripherals from the FDT. */
fdti = fdt_generic_create_machine(fdt, NULL);
main_mem = MEMORY_REGION(object_resolve_path(node_path, NULL));
ram_kernel_base = object_property_get_int(OBJECT(main_mem), "addr", NULL);
ram_kernel_size = object_property_get_int(OBJECT(main_mem), "size", NULL);
if (!memory_region_is_mapped(main_mem)) {
/* If the memory region is not mapped, map it here.
* It has to be mapped somewhere, so guess that the base address
* is where the kernel starts
*/
memory_region_add_subregion(get_system_memory(), ram_kernel_base,
main_mem);
if (ram_kernel_base && IS_PETALINUX_MACHINE) {
/* If the memory added is at an offset from zero QEMU will error
* when an ISR/exception is triggered. Add a small amount of hack
* RAM to handle this.
*/
MemoryRegion *hack_ram = g_new(MemoryRegion, 1);
memory_region_init_ram(hack_ram, NULL, "hack_ram", 0x1000,
&error_abort);
vmstate_register_ram_global(hack_ram);
memory_region_add_subregion(get_system_memory(), 0, hack_ram);
}
}
fdt_init_destroy_fdti(fdti);
fdt_g = fdt;
microblaze_load_kernel(MICROBLAZE_CPU(first_cpu), ram_kernel_base,
ram_kernel_size, machine->initrd_filename, NULL,
microblaze_generic_fdt_reset, 0, fdt, fdt_size);
/* Register FDT to prop mapper for secondary cores. */
cpu = CPU_NEXT(first_cpu);
while (cpu) {
qemu_register_reset(secondary_cpu_reset, cpu);
cpu = CPU_NEXT(cpu);
}
return;
no_dtb_arg:
if (!QTEST_RUNNING) {
hw_error("DTB must be specified for %s machine model\n", MACHINE_NAME);
}
return;
}
