static int __init norrin_cl_dvfs_init(void)
{
	struct board_info board_info;
	struct device_node *dn = of_find_matching_node(NULL, dfll_of_match);

	/*
	 * Norrin platforms maybe used with different DT variants. Some of them
	 * include DFLL data in DT, some - not. Check DT here, and continue with
	 * platform device registration only if DT DFLL node is not present.
	 */
	if (dn) {
		bool available = of_device_is_available(dn);
		of_node_put(dn);
		if (available)
			return 0;
	}

	tegra_get_board_info(&board_info);

	fill_reg_map(&board_info);
	norrin_cl_dvfs_data.flags = TEGRA_CL_DVFS_DYN_OUTPUT_CFG;
	if (board_info.board_id == BOARD_PM374)
		norrin_cl_dvfs_data.flags |= TEGRA_CL_DVFS_DATA_NEW_NO_USE;
	tegra_cl_dvfs_device.dev.platform_data = &norrin_cl_dvfs_data;
	platform_device_register(&tegra_cl_dvfs_device);

	return 0;
}
static int __init pismo_cl_dvfs_init(void)
{
	fill_reg_map();
	tegra_cl_dvfs_device.dev.platform_data = &pismo_cl_dvfs_data;
	platform_device_register(&tegra_cl_dvfs_device);

	return 0;
}
static int __init dalmore_cl_dvfs_init(void)
{
	fill_reg_map();
	if (tegra_revision < TEGRA_REVISION_A02)
		dalmore_cl_dvfs_data.flags = TEGRA_CL_DVFS_FLAGS_I2C_WAIT_QUIET;
	tegra_cl_dvfs_device.dev.platform_data = &dalmore_cl_dvfs_data;
	platform_device_register(&tegra_cl_dvfs_device);

	return 0;
}
static int __init tegratab_cl_dvfs_init(void)
{
	fill_reg_map();
	if (tegra_revision < TEGRA_REVISION_A02)
		tegratab_cl_dvfs_data.out_quiet_then_disable = true;
	tegra_cl_dvfs_device.dev.platform_data = &tegratab_cl_dvfs_data;
	platform_device_register(&tegra_cl_dvfs_device);

	return 0;
}
Example #5
0
static int __init laguna_cl_dvfs_init(void)
{
	struct device_node *dn = of_find_matching_node(NULL, dfll_of_match);

	/*
	 * Laguna platforms maybe used with different DT variants. Some of them
	 * include DFLL data in DT, some - not. Check DT here, and continue with
	 * platform device registration only if DT DFLL node is not present.
	 */
	if (dn) {
		bool available = of_device_is_available(dn);
		of_node_put(dn);
		if (available)
			return 0;
	}

	fill_reg_map();
	laguna_cl_dvfs_data.flags = TEGRA_CL_DVFS_DYN_OUTPUT_CFG;
	tegra_cl_dvfs_device.dev.platform_data = &laguna_cl_dvfs_data;
	platform_device_register(&tegra_cl_dvfs_device);

	return 0;
}