void
pipestart(ASTNode *n, Symbol *cl, Symbol *go)
{
if(curfsm != nil || curpipe != nil)
error(nil, "nested pipe");
curpipe = n;
lastlab = nil;
if(cl != nil)
n->sym->clock = node(ASTSYMB, cl);
else
n->sym->clock = node(ASTSYMB, findclock(n->sym));
if(go != nil)
n->n2 = vardecl(scope->up, node(ASTSYMB, go), 0, nil, type(TYPBITV, nil, 0), nil);
}
static MonitorModeTiming *search_mode(MonitorModeTiming * timings,
int maxclock,
ModeInfo * modeinfo,
CardSpecs * cardspecs)
{
int bestclock = 0;
MonitorModeTiming *besttiming = NULL, *t;
/*
* bestclock is the highest pixel clock found for the resolution
* in the mode timings, within the spec of the card and
* monitor.
* besttiming holds a pointer to timing with this clock.
*/
/* Search the timings for the best matching mode. */
for (t = timings; t; t = t->next)
if (t->HDisplay == modeinfo->width
&& t->VDisplay == modeinfo->height
&& ( (!(t->flags&INTERLACED)) || (!(cardspecs->flags&NO_INTERLACE)) )
&& timing_within_monitor_spec(t)
&& t->pixelClock <= maxclock
&& t->pixelClock > bestclock
&& cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
t->pixelClock,
t->HTotal)
<= cardspecs->maxHorizontalCrtc
/* Find the clock (possibly scaled by mapClock). */
&& findclock(cardspecs->mapClock(modeinfo->bitsPerPixel,
t->pixelClock), cardspecs) != -1
) {
bestclock = t->pixelClock;
besttiming = t;
}
return besttiming;
}
int __svgalib_getmodetiming(ModeTiming * modetiming, ModeInfo * modeinfo,
CardSpecs * cardspecs)
{
int maxclock, desiredclock;
MonitorModeTiming *besttiming=NULL;
if(force_timing){
if(timing_within_monitor_spec(force_timing) &&
force_timing->HDisplay == modeinfo->width &&
force_timing->VDisplay == modeinfo->height)
{
besttiming=force_timing;
};
};
/* Get the maximum pixel clock for the depth of the requested mode. */
if (modeinfo->bitsPerPixel == 4)
maxclock = cardspecs->maxPixelClock4bpp;
else if (modeinfo->bitsPerPixel == 8)
maxclock = cardspecs->maxPixelClock8bpp;
else if (modeinfo->bitsPerPixel == 16) {
if ((cardspecs->flags & NO_RGB16_565)
&& modeinfo->greenWeight == 6)
return 1; /* No 5-6-5 RGB. */
maxclock = cardspecs->maxPixelClock16bpp;
} else if (modeinfo->bitsPerPixel == 24)
maxclock = cardspecs->maxPixelClock24bpp;
else if (modeinfo->bitsPerPixel == 32)
maxclock = cardspecs->maxPixelClock32bpp;
else
maxclock = 0;
/*
* Check user defined timings first.
* If there is no match within these, check the standard timings.
*/
if(!besttiming)
besttiming = search_mode(user_timings, maxclock, modeinfo, cardspecs);
if (!besttiming) {
besttiming = search_mode(__svgalib_standard_timings, maxclock, modeinfo, cardspecs);
if (!besttiming)
return 1;
}
/*
* Copy the selected timings into the result, which may
* be adjusted for the chipset.
*/
modetiming->flags = besttiming->flags;
modetiming->pixelClock = besttiming->pixelClock; /* Formal clock. */
/*
* We know a close enough clock is available; the following is the
* exact clock that fits the mode. This is probably different
* from the best matching clock that will be programmed.
*/
desiredclock = cardspecs->mapClock(modeinfo->bitsPerPixel,
besttiming->pixelClock);
/* Fill in the best-matching clock that will be programmed. */
modetiming->selectedClockNo = findclock(desiredclock, cardspecs);
if (modetiming->selectedClockNo == PROGRAMMABLE_CLOCK_MAGIC_NUMBER) {
modetiming->programmedClock =
cardspecs->matchProgrammableClock(desiredclock);
modetiming->flags |= USEPROGRCLOCK;
} else
modetiming->programmedClock = cardspecs->clocks[
modetiming->selectedClockNo];
modetiming->HDisplay = besttiming->HDisplay;
modetiming->HSyncStart = besttiming->HSyncStart;
modetiming->HSyncEnd = besttiming->HSyncEnd;
modetiming->HTotal = besttiming->HTotal;
if (cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
modetiming->programmedClock,
besttiming->HTotal)
!= besttiming->HTotal) {
/* Horizontal CRTC timings are scaled in some way. */
modetiming->CrtcHDisplay =
cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
modetiming->programmedClock,
besttiming->HDisplay);
modetiming->CrtcHSyncStart =
cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
modetiming->programmedClock,
besttiming->HSyncStart);
modetiming->CrtcHSyncEnd =
cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
modetiming->programmedClock,
besttiming->HSyncEnd);
modetiming->CrtcHTotal =
cardspecs->mapHorizontalCrtc(modeinfo->bitsPerPixel,
modetiming->programmedClock,
besttiming->HTotal);
modetiming->flags |= HADJUSTED;
} else {
modetiming->CrtcHDisplay = besttiming->HDisplay;
modetiming->CrtcHSyncStart = besttiming->HSyncStart;
modetiming->CrtcHSyncEnd = besttiming->HSyncEnd;
modetiming->CrtcHTotal = besttiming->HTotal;
}
modetiming->VDisplay = besttiming->VDisplay;
modetiming->VSyncStart = besttiming->VSyncStart;
modetiming->VSyncEnd = besttiming->VSyncEnd;
modetiming->VTotal = besttiming->VTotal;
if (modetiming->flags & DOUBLESCAN){
modetiming->VDisplay <<= 1;
modetiming->VSyncStart <<= 1;
modetiming->VSyncEnd <<= 1;
modetiming->VTotal <<= 1;
}
modetiming->CrtcVDisplay = modetiming->VDisplay;
modetiming->CrtcVSyncStart = modetiming->VSyncStart;
modetiming->CrtcVSyncEnd = modetiming->VSyncEnd;
modetiming->CrtcVTotal = modetiming->VTotal;
if (((modetiming->flags & INTERLACED)
&& (cardspecs->flags & INTERLACE_DIVIDE_VERT))
|| (modetiming->VTotal >= 1024
&& (cardspecs->flags & GREATER_1024_DIVIDE_VERT))) {
/*
* Card requires vertical CRTC timing to be halved for
* interlaced modes, or for all modes with vertical
* timing >= 1024.
*/
modetiming->CrtcVDisplay /= 2;
modetiming->CrtcVSyncStart /= 2;
modetiming->CrtcVSyncEnd /= 2;
modetiming->CrtcVTotal /= 2;
modetiming->flags |= VADJUSTED;
}
current_timing=besttiming;
return 0; /* Succesful. */
}
