// Verifies that update-start command is valid.
// Will enter RECEIVING_FIRMWARE state if everything checks out.
static void startFirmwareUpdate()
{
uint8_t i, checksum = 0;//, reset_vector[3];
// Calculate checksum
for (i = 0; i < UPDATE_START_LENGTH; i++) {
checksum += MSG_PAYLOAD(i);
}
// Checksum fail
if (checksum != 0) {
send_buf[1] = ERROR_CHECKSUM_FAIL;
send(CMD_NACK,2);
return;
}
// Get firmware size, NOT including reset vector
bytes_total = MSG_ST_BYTES;
// Check that firmware is within legal size range.
if (bytes_total > FLASH_FW_MAX_SIZE) {
// Send error report to host.
send_buf[1] = ERROR_ILLEGAL_SIZE;
send(CMD_NACK,2);
return;
}
// Get firmware's reset vector.
temp_data[0] = MSG_ST_RESET_OPCODE;
temp_data[1] = MSG_ST_RESET_ADDR_H;
temp_data[2] = MSG_ST_RESET_ADDR_L;
// Write reset vector to non-volatile flash
flash_erase_page(FW_NV_DATA_PAGE);
flash_write_bytes(FW_RESET_VECTOR, temp_data, 3);
// Get firmware serial number. Will be written to NV when update complete.
firmware_number = MSG_ST_NUMBER;
bytes_received = 0;
/*
// Read out old reset vector.
movx_access_code();
flash_read_bytes(0x0000, reset_vector, 3);
movx_access_data();
// Erase first page, containing reset vector.
flash_erase_page(0);
// Write back the old reset vector.
movx_access_code();
flash_write_bytes(0x0000, reset_vector, 3);
movx_access_data();
// Erase the reset of pages available to firmware.
*/
for (i = BOOTLOADER_PAGES; i < BOOTLOADER_PAGES+FLASH_PAGES(bytes_total); ++i) {
flash_erase_page(i);
}
send(CMD_ACK,1);
if (send_success) state = RECEIVING_FIRMWARE;
else state = PINGING;
return;
}
OSStatus internalFlashErase(uint32_t start_address, uint32_t end_address)
{
platform_log_trace();
uint32_t i;
OSStatus err = kNoErr;
uint32_t page_start_address, page_end_address;
uint32_t page_start_number, page_end_number;
platform_mcu_powersave_disable();
require_action( flash_unlock( start_address, end_address, &page_start_address, &page_end_address ) == FLASH_RC_OK, exit, err = kGeneralErr );
page_start_number = page_start_address/512;
page_end_number = page_end_address/512;
require_action( page_end_number >= page_start_number + 16, exit, err = kUnsupportedErr);
for ( i = page_start_number; i <= page_end_number; i+=16 )
{
require_action( flash_erase_page( i * 512, IFLASH_ERASE_PAGES_16) == FLASH_RC_OK, exit, err = kGeneralErr );
}
require_action( flash_lock( start_address, end_address, NULL, NULL ) == FLASH_RC_OK, exit, err = kGeneralErr );
exit:
platform_mcu_powersave_enable();
return err;
}
void flash_write_struct(uint32_t address, uint8_t *struct_p, uint32_t size){
uint16_t data=0;
uint32_t i;
flash_erase_page(params_addr);
for(i=0; i<size; i+=2){
if(i == (size-1) && (size % 2) != 0){
data = 0xff;
data = data << 8;
data |= struct_p[i];
}
else{
data = struct_p[i+1];
data = data << 8;
data |= struct_p[i];
}
flash_unlock();
FLASH->CR |= FLASH_CR_PG; //Разрешаем программирование флеша
while(!flash_ready()) //Ожидаем готовности флеша к записи
;
*(__IO uint16_t*)address = data; //Пишем младшие 2 бата
while(!flash_ready())
;
FLASH->CR &= ~(FLASH_CR_PG); //Запрещаем программирование флеша
FLASH->CR &= ~FLASH_CR_PER; //Сбрасываем бит обратно
flash_lock();
address+=2;
}
}
/* erase complete configuration store */
void config_erase(void) {
flash_unlock();
for(void *config = (void*)CONFIG_ADDRESS; config < (void*)(CONFIG_ADDRESS + CONFIG_SIZE); config += FLASH_PAGE_SIZE) {
flash_erase_page((uint32_t)config);
}
flash_lock();
}
/**
* Erase area in flash
*
* \param addr Flash address in bytes
* \param size number of bytes to erase
*
* \return erased bytes (could be larger than size)
*/
uint32_t mem_flash_erase(void *addr, uint32_t size)
{
#if SAM4S || SAM4E || SAM4N
uint32_t page_addr = (uint32_t)addr;
uint32_t page_off = page_addr % (IFLASH_PAGE_SIZE*8);
uint32_t rc, erased = 0;
if (page_off) {
dbg_print("flash: erase address must be 8 page aligned\r\n");
page_addr = page_addr - page_off;
dbg_print("flash: erase from %x\r\n", (unsigned)page_addr);
}
for (erased = 0; erased < size;) {
rc = flash_erase_page((uint32_t)page_addr, IFLASH_ERASE_PAGES_8);
erased += IFLASH_PAGE_SIZE*8;
page_addr += IFLASH_PAGE_SIZE*8;
if (rc != FLASH_RC_OK) {
dbg_print("flash: %x erase error\r\n", (unsigned)page_addr);
break;
}
}
return erased;
#else
/* Everything assume to be erased since we use erase and write command */
UNUSED(addr);
return size;
#endif
}
static void mem_flash_write(isp_addr_t dst, const void *src, uint16_t nbytes)
{
uint32_t ul_rc;
if (((dst - IFLASH0_ADDR) % LOCK_REGION_SIZE) == 0) {
/* Unlock page */
//ul_rc = flash_unlock(dst, dst+nbytes-1, 0, 0);
ul_rc = flash_unlock(dst, dst+LOCK_REGION_SIZE-1, 0, 0);
if (ul_rc != FLASH_RC_OK) {
return;
}
/* The EWP command is not supported for non-8KByte sectors in all devices
* SAM4 series, so an erase command is requried before the write operation.
*/
//ul_rc = flash_erase_sector(dst);
ul_rc = flash_erase_page(dst, IFLASH_ERASE_PAGES_16);
if (ul_rc != FLASH_RC_OK) {
return;
}
}
/* Write page */
flash_write(dst, src, nbytes, 0);
}
void dfu_check_and_do_sector_erase(uint32_t sector)
{
sector &= (~(FLASHBLOCKSIZE - 1));
if (sector != last_erased_page) {
flash_erase_page(sector);
last_erased_page = sector;
}
}
void store_conf(conf *my_conf)
{
sw_version ver;
get_version(&ver);
flash_erase_page(params_addr);
flash_write_struct(&ver, sizeof(sw_version), 0);
flash_write_struct(my_conf, sizeof(conf), sizeof(sw_version));
}
// Clears/Erases for a given variable id the flash pages used for the NVM
static void nvm_var_clear(uint8_t var_id)
{
uint32_t addr;
addr = NVM_MULTI_WRITE_START + (var_id * NVM_MULTI_WRITE_NUM_PG_PER_VAR * SPM_PAGESIZE);
for (uint8_t i = 0; i < NVM_MULTI_WRITE_NUM_PG_PER_VAR; i++)
{
flash_erase_page(addr);
addr += SPM_PAGESIZE;
}
}
status_code_t nvm_write(mem_type_t mem, uint32_t address, void *buffer,
uint32_t len)
{
switch (mem) {
case INT_FLASH:
#if SAM4S
/*! This erases 8 pages of flash before writing */
if (flash_erase_page(address, IFLASH_ERASE_PAGES_8)) {
return ERR_INVALID_ARG;
}
if (flash_write(address, (const void *)buffer, len, false)) {
return ERR_INVALID_ARG;
}
#elif SAM4L
flashcalw_memcpy((volatile void *)address, (const void *)buffer,
len, true);
#else
if (flash_write(address, (const void *)buffer, len, true)) {
return ERR_INVALID_ARG;
}
#endif
break;
#if SAM4S
case INT_USERPAGE:
if (flash_write_user_signature((const void *)buffer, len)) {
return ERR_INVALID_ARG;
}
break;
#endif
#if defined(USE_EXTMEM) && defined(CONF_BOARD_AT45DBX)
case AT45DBX:
{
uint32_t sector = address / AT45DBX_SECTOR_SIZE;
if (!at45dbx_write_sector_open(sector)) {
return ERR_BAD_ADDRESS;
}
at45dbx_write_sector_from_ram((const void *)buffer);
at45dbx_write_close();
}
break;
#endif
default:
return ERR_INVALID_ARG;
}
return STATUS_OK;
}
status_code_t nvm_write_char(mem_type_t mem, uint32_t address, uint8_t data)
{
switch (mem) {
case INT_FLASH:
#if SAM4S
/*! This erases 8 pages of flash before writing */
if (flash_erase_page(address, IFLASH_ERASE_PAGES_8)) {
return ERR_INVALID_ARG;
} else if (flash_write(address, (const void *)&data, 1,
false)) {
return ERR_INVALID_ARG;
}
#else
if (flash_write(address, (const void *)&data, 1, true)) {
return ERR_INVALID_ARG;
}
#endif
break;
#if SAM4S
case INT_USERPAGE:
if (flash_write_user_signature((const void *)&data, 1)) {
return ERR_INVALID_ARG;
}
break;
#endif
#if defined(USE_EXTMEM) && defined(CONF_BOARD_AT45DBX)
case AT45DBX:
if (!at45dbx_write_byte_open() address) {
return ERR_BAD_ADDRESS;
}
at45dbx_write_byte(data);
at45dbx_write_close();
at45dbx_read_byte_open(address);
read = at45dbx_read_byte();
at45dbx_read_close();
break;
#endif
default:
return ERR_INVALID_ARG;
}
return STATUS_OK;
}
status_code_t nvm_page_erase(mem_type_t mem, uint32_t page_number)
{
switch (mem) {
case INT_FLASH:
flash_erase_page(page_number);
break;
default:
return ERR_INVALID_ARG;
}
return STATUS_OK;
}
// Erase flash if full
// Only erases flash if erase flag has been set
// storage_init() must be called first
//
// Returns:
// 0 - Erase was not done (invalid status for erasure)
// 1 - Erase completed
static uint8_t storage_erase_flash()
{
// If we have wrapped around the reserved 16 pages, delete everything
if ( current_page == 0 && erase_flag && current_storage_index == 0 )
{
// Erase the first 8 pages
uint32_t status = flash_erase_page( STORAGE_FLASH_START, IFLASH_ERASE_PAGES_8 );
if ( status )
{
print("Failed erasing pages 0..7: ");
#if defined(_bootloader_)
printHex( status );
#else
printHex32( status );
#endif
print( NL );
}
// Erase the last 8 pages
status = flash_erase_page( STORAGE_FLASH_START + (STORAGE_FLASH_PAGE_SIZE * 8), IFLASH_ERASE_PAGES_8 );
if ( status )
{
print("Failed erasing pages 8..15: ");
#if defined(_bootloader_)
printHex( status );
#else
printHex32( status );
#endif
print( NL );
}
return 1;
}
return 0;
}
/**
* @fn static void eeprom_format_page(U16 phy_addr)
* @brief erase page and write erase count plus 1 in TAG position.
* for erase count equal 0xFFFFFF, plus '1' will get 0x1000000, and will only
* write 24 bits 0x000000 into flash.
* @param phy_addr physical page address
*
* @return none
*/
static void eeprom_format_page(U16 phy_addr)
{
UU32 erase_count;
/* Ignore first byte in page, it is flash status byte*/
erase_count.U8[0] = 0;
erase_count.U8[1] = flash_read_byte(phy_addr + 1);
erase_count.U8[2] = flash_read_byte(phy_addr + 2);
erase_count.U8[3] = flash_read_byte(phy_addr + 3);
erase_count.U32 += 1;
flash_erase_page(phy_addr);
flash_write_byte(phy_addr + 1, erase_count.U8[1]);
flash_write_byte(phy_addr + 2, erase_count.U8[2]);
flash_write_byte(phy_addr + 3, erase_count.U8[3]);
}
static int32_t pflash_program_bytes(struct FlashInfo* flash,
uint32_t src,
uint32_t size,
uint32_t chksum) {
uint32_t i;
/* erase */
flash_unlock();
flash_erase_page(flash->addr);
flash_lock();
/* verify erase */
for (i=0; i<flash->page_size; i+=4) {
if ((*(uint32_t*) (flash->addr + i)) != 0xFFFFFFFF) return -1;
}
flash_unlock();
/* write full 16 bit words */
for (i=0; i<(size & ~1); i+=2) {
flash_program_half_word(flash->addr+i,
(uint16_t)(*(uint8_t*)(src+i) | (*(uint8_t*)(src+i+1)) << 8));
}
/* fill bytes with a zero */
if (size & 1) {
flash_program_half_word(flash->addr+i, (uint16_t)(*(uint8_t*)(src+i)));
}
/* write size */
flash_program_half_word(flash->addr+flash->page_size-FSIZ,
(uint16_t)(size & 0xFFFF));
flash_program_half_word(flash->addr+flash->page_size-FSIZ+2,
(uint16_t)((size >> 16) & 0xFFFF));
/* write checksum */
flash_program_half_word(flash->addr+flash->page_size-FCHK,
(uint16_t)(chksum & 0xFFFF));
flash_program_half_word(flash->addr+flash->page_size-FCHK+2,
(uint16_t)((chksum >> 16) & 0xFFFF));
flash_lock();
/* verify data */
for (i=0; i<size; i++) {
if ((*(uint8_t*) (flash->addr+i)) != (*(uint8_t*) (src+i))) return -2;
}
if (*(uint32_t*) (flash->addr+flash->page_size-FSIZ) != size) return -3;
if (*(uint32_t*) (flash->addr+flash->page_size-FCHK) != chksum) return -4;
return 0;
}
//erase all of flash
UBYTE flash_erase()
{
UWORD i;
// UBYTE temp[20];
// sprintf_P(temp,"Eraseing");
// LCD_print1(temp,0);
for(i=0; i<(FLASH_MAX_PAGES>>8); i++)
{
//sprintf_P(temp,"%lu",i);
//LCD_print2(temp,2);
printf_P(PSTR("Erasing Page %u\n\r"),i);
if (flash_erase_page(i)!=0)
return 1;
}
// sprintf_P(temp,"DONE!");
// LCD_print2(temp,0);
return 0;
}
status_code_t nvm_page_erase(mem_type_t mem, uint32_t page_number)
{
switch (mem) {
case INT_FLASH:
{
#if SAM4S
/*! Page erase function erases minimum 8 pages in Flash */
if (flash_erase_page((uint32_t)(page_number * IFLASH_PAGE_SIZE),
IFLASH_ERASE_PAGES_8)) {
return ERR_INVALID_ARG;
}
#elif SAM4L
/* TO Do*/
#else
uint32_t buffer[IFLASH_PAGE_SIZE], byte_address;
for (uint16_t i = 0; i < IFLASH_PAGE_SIZE; i++) {
buffer[i] = 0xFFFFFFFF;
}
byte_address = page_number * IFLASH_PAGE_SIZE;
/* Erase and write FFs to a page as there is no function for
* erase */
if (!flash_write(byte_address, (const void *)buffer,
IFLASH_PAGE_SIZE, true)) {
return ERR_INVALID_ARG;
}
#endif
break;
}
#if SAM4S
case INT_USERPAGE:
flash_erase_user_signature();
break;
#endif
default:
return ERR_INVALID_ARG;
}
return STATUS_OK;
}
unsigned char tsc_flash_write_erase_operate(u32 Address,u8 * buff,u32 len)
{
u32 bBeginPage,bEndPage;
unsigned char sPageBuf[2048];
u32 nCurAddress,nCurLen,nSize,i,nOffset;
//trace_debug_printf("TscEndAddr = %x,address = %x\n\r",TscEndAddr,(Address + TscStartAddr));
//if( Address<SysStartAddr || Address+len>SysEndAddr )
if((Address + TscStartAddr) > TscEndAddr)
return WR_ADDRESS_ERR;
if( (Address+len+TscStartAddr)>TscEndAddr )
return ADDRESS_LEN_ERR;
bBeginPage = (Address+TscStartAddr)/FLASH_PAGE_SIZE;
//if( (Address+SysStartAddr)%FLASH_PAGE_SIZE)
// bBeginPage++;
bEndPage = (Address+TscStartAddr+len)/FLASH_PAGE_SIZE;
if( (Address+TscStartAddr+len)%FLASH_PAGE_SIZE)
bEndPage++;
nCurAddress = Address+TscStartAddr;
nCurLen = len;
nOffset = 0;
for(i=bBeginPage;i<bEndPage;i++)
{
flash_read_operate(i*FLASH_PAGE_SIZE,sPageBuf,FLASH_PAGE_SIZE);
flash_erase_page(i);
//nSize = nCurLen%FLASH_PAGE_SIZE;
nSize =FLASH_PAGE_SIZE- ((nCurAddress-TscStartAddr)%FLASH_PAGE_SIZE);
if(nSize>nCurLen)
nSize =nCurLen;
memcpy(&sPageBuf[nCurAddress%FLASH_PAGE_SIZE],(unsigned char *)&buff[nOffset],nSize);
flash_write_operate(i*FLASH_PAGE_SIZE,(unsigned short *)sPageBuf,FLASH_PAGE_SIZE);
//test
//bRet = flash_read_operate(i*FLASH_PAGE_SIZE,sPageBuf,FLASH_PAGE_SIZE);
nCurLen -= nSize;
nCurAddress += nSize;
nOffset +=nSize;
}
return 0;
}
//13/07/09
int _CopyFromBack(unsigned int nAddr)
{
u32 bBeginPage;
u8 sPageBuf[2048];
int bRet;
#define FLASH_PAGE_SIZE ((u16)0x800)//2K/a block
//test
trace_debug_printf("CopyFromBack[%x]H\n",nAddr);
bBeginPage = (nAddr+SysStartAddr)/FLASH_PAGE_SIZE;
//read from back
bRet = flash_read_operate(bBeginPage*FLASH_PAGE_SIZE+PCI_BACK_ADDR,sPageBuf,FLASH_PAGE_SIZE);
flash_erase_page(bBeginPage);
if(bBeginPage==(SysStartAddr/FLASH_PAGE_SIZE))
flash_read_operate(bBeginPage*FLASH_PAGE_SIZE,sPageBuf,PCI_PIN_MKEY_ADDR);
bRet = CrcPageCalc(bBeginPage-SysStartAddr/FLASH_PAGE_SIZE,sPageBuf);
//write local
bRet = flash_write_operate(bBeginPage*FLASH_PAGE_SIZE,(unsigned short *)sPageBuf,FLASH_PAGE_SIZE);
return bRet;
}
/*
* \brief Commit demo parameters.
*/
uint32_t demo_parameters_commit_changes( void )
{
uint32_t ret;
taskENTER_CRITICAL();
flash_init(FLASH_ACCESS_MODE_128, 6);
flash_unlock(IFLASH0_ADDR, __offset_parameters__ + IFLASH0_PAGE_SIZE - 1,
0, 0);
#if SAM4S
/* Erase flag page */
flash_erase_page(__offset_parameters__, IFLASH_ERASE_PAGES_8);
ret = flash_write((uint32_t)(__offset_parameters__),
(void *)&g_demo_parameters, sizeof(demo_param_t), 0);
#else
ret = flash_write((uint32_t)(__offset_parameters__),
(void *)&g_demo_parameters, sizeof(demo_param_t), 1);
#endif
taskEXIT_CRITICAL();
return ret;
}
static u32 flash_program_data(u32 start_address, u8 *input_data, u16 num_elements)
{
u16 iter;
u32 current_address = start_address;
u32 page_address = start_address;
u32 flash_status = 0;
/*check if start_address is in proper range*/
if((start_address - FLASH_BASE) >= (FLASH_PAGE_SIZE * (FLASH_PAGE_NUM_MAX+1)))
return 1;
/*calculate current page address*/
if(start_address % FLASH_PAGE_SIZE)
page_address -= (start_address % FLASH_PAGE_SIZE);
flash_unlock();
/*Erasing page*/
flash_erase_page(page_address);
flash_status = flash_get_status_flags();
if(flash_status != FLASH_SR_EOP)
return flash_status;
/*programming flash memory*/
for(iter=0; iter<num_elements; iter += 4)
{
/*programming word data*/
flash_program_word(current_address+iter, *((u32*)(input_data + iter)));
flash_status = flash_get_status_flags();
if(flash_status != FLASH_SR_EOP)
return flash_status;
/*verify if correct data is programmed*/
if(*((u32*)(current_address+iter)) != *((u32*)(input_data + iter)))
return FLASH_WRONG_DATA_WRITTEN;
}
return 0;
}
void config_store(void) {
uint16_t size = sizeof(struct Config);
uint32_t addr = CONFIG_ADDR;
uint8_t *byte_config = (uint8_t *)&usbrf_config;
uint16_t write_word;
int i;
/* Unlock flash. */
flash_unlock();
/* Erase the config storage page. */
flash_erase_page(CONFIG_ADDR);
/* Write config struct to flash. */
write_word = 0xFFFF;
for (i = 0; i < size; i++) {
write_word = (write_word << 8) | (*(byte_config++));
if ((i % 2) == 1) {
flash_program_half_word(addr, write_word);
addr += 2;
}
}
if ((i % 2) == 1) {
write_word = (write_word << 8) | 0xFF;
flash_program_half_word(addr, write_word);
}
/* Write config CRC to flash. */
/* Lock flash. */
flash_lock();
/* Check flash content for accuracy. */
}
OSStatus internalFlashErase(uint32_t start_address, uint32_t end_address)
{
platform_log_trace();
OSStatus err = kNoErr;
uint32_t page_addr = start_address;
uint32_t page_off = page_addr % (IFLASH_PAGE_SIZE*16);
uint32_t rc, erased = 0;
uint32_t size = end_address - start_address;
if (page_off) {
platform_log("flash: erase address must be 16 page aligned");
page_addr = page_addr - page_off;
platform_log("flash: erase from %x", (unsigned)page_addr);
}
for (erased = 0; erased < size;) {
rc = flash_erase_page((uint32_t)page_addr, IFLASH_ERASE_PAGES_16);
erased += IFLASH_PAGE_SIZE*16;
page_addr += IFLASH_PAGE_SIZE*16;
if (rc != FLASH_RC_OK) {
platform_log("flash: %x erase error", (unsigned)page_addr);
return kGeneralErr;
}
}
return err;
}
static int USER_FUNC download_audio_file(char *purl)
{
httpc_req_t http_req;
char *content_data=NULL;
char *temp_buf=NULL;
parsed_url_t url={0};
http_session_t hhttp=0;
int total_size,read_size=0;
int rv=0;
tls_init_config_t *tls_cfg=NULL;
char *test_url=purl;
bzero(&http_req,sizeof(http_req));
http_req.type = HTTP_GET;
http_req.version=HTTP_VER_1_1;
if((temp_buf = (char*)hfmem_malloc(256))==NULL)
{
u_printf("no memory\n");
rv= -HF_E_NOMEM;
goto exit;
}
bzero(temp_buf,sizeof(temp_buf));
if((rv=hfhttp_parse_URL(test_url,temp_buf , 256, &url))!=HF_SUCCESS)
{
goto exit;
}
if((rv=hfhttp_open_session(&hhttp,test_url,0,tls_cfg,3))!=HF_SUCCESS)
{
u_printf("http open fail\n");
goto exit;
}
hfsys_disable_all_soft_watchdogs();
flash_erase_page(AUDIO_FILE_FLASH_OFFSET,AUDIO_FILE_MAX_SIZE/HFFLASH_PAGE_SIZE);
http_req.resource = url.resource;
hfhttp_prepare_req(hhttp,&http_req,HDR_ADD_CONN_CLOSE);
hfhttp_add_header(hhttp,"Range","bytes=0");
if((rv=hfhttp_send_request(hhttp,&http_req))!=HF_SUCCESS)
{
u_printf("http send request fail\n");
goto exit;
}
content_data = (char*)hfmem_malloc(256);
if(content_data==NULL)
{
rv= -HF_E_NOMEM;
goto exit;
}
total_size=0;
bzero(content_data,256);
while((read_size=hfhttp_read_content(hhttp,content_data,256))>0)
{
hfgpio_fset_out_high(HFGPIO_F_NREADY);
flash_write(AUDIO_FILE_FLASH_OFFSET+total_size,content_data,read_size,0);
total_size+=read_size;
hfgpio_fset_out_low(HFGPIO_F_NREADY);
u_printf("download file:[%d] [%d]\r",total_size,read_size);
}
hfgpio_fset_out_low(HFGPIO_F_NREADY);
exit:
hfsys_enable_all_soft_watchdogs();
if(temp_buf!=NULL)
hfmem_free(temp_buf);
if(content_data!=NULL)
hfmem_free(content_data);
if(hhttp!=0)
hfhttp_close_session(&hhttp);
hfgpio_fset_out_low(HFGPIO_F_NREADY);
return rv;
}
// *************************************************************************************************
// @fn simpliciti_sync_decode_ap_cmd_callback
// @brief For SYNC mode only: Decode command from access point and trigger actions.
// @param none
// @return none
// *************************************************************************************************
void simpliciti_sync_decode_ap_cmd_callback(void)
{
u8 i;
s16 t1, offset;
// Default behaviour is to send no reply packets
simpliciti_reply_count = 0;
switch (simpliciti_data[0])
{
case SYNC_AP_CMD_NOP: break;
case SYNC_AP_CMD_GET_STATUS: // Send watch parameters
simpliciti_data[0] = SYNC_ED_TYPE_STATUS;
// Send single reply packet
simpliciti_reply_count = 1;
break;
case SYNC_AP_CMD_SET_WATCH: // Set watch parameters
sys.flag.use_metric_units = (simpliciti_data[1] >> 7) & 0x01;
sTime.hour = simpliciti_data[1] & 0x7F;
sTime.minute = simpliciti_data[2];
sTime.second = simpliciti_data[3];
sDate.year = (simpliciti_data[4]<<8) + simpliciti_data[5];
sDate.month = simpliciti_data[6];
sDate.day = simpliciti_data[7];
// Set temperature and temperature offset
t1 = (s16)((simpliciti_data[10]<<8) + simpliciti_data[11]);
offset = t1 - (sAlt.temperature_C - sAlt.temperature_C_offset);
sAlt.temperature_C_offset = offset;
sAlt.temperature_C = t1;
// Set altitude
sAlt.altitude = (s16)((simpliciti_data[12]<<8) + simpliciti_data[13]);
update_pressure_table(sAlt.altitude, sAlt.pressure, sAlt.temperature_K);
// Data logging mode
sDatalog.mode = simpliciti_data[14];
// Data logging interval
sDatalog.interval = simpliciti_data[15];
break;
case SYNC_AP_CMD_GET_MEMORY_BLOCKS_MODE_1:
// Send sequential packets out in a burst
simpliciti_data[0] = SYNC_ED_TYPE_MEMORY;
// Get burst start and end packet
burst_start = (simpliciti_data[1]<<8)+simpliciti_data[2];
burst_end = (simpliciti_data[3]<<8)+simpliciti_data[4];
// Set burst mode
burst_mode = 1;
// Number of packets to send
simpliciti_reply_count = burst_end - burst_start + 1;
break;
case SYNC_AP_CMD_GET_MEMORY_BLOCKS_MODE_2:
// Send specified packets out in a burst
simpliciti_data[0] = SYNC_ED_TYPE_MEMORY;
// Store the requested packets
for (i=0; i<BM_SYNC_BURST_PACKETS_IN_DATA; i++)
{
burst_packet[i] = (simpliciti_data[i*2+1]<<8)+simpliciti_data[i*2+2];
}
// Set burst mode
burst_mode = 2;
// Number of packets to send
simpliciti_reply_count = BM_SYNC_BURST_PACKETS_IN_DATA;
break;
case SYNC_AP_CMD_ERASE_MEMORY: // Erase data logger memory
for (i=DATALOG_PAGE_START; i<=DATALOG_PAGE_END; i++)
{
flash_erase_page(i);
}
sDatalog.wptr = (u16*)DATALOG_MEMORY_START;
sDatalog.flags.flag.memory_full = 0;
break;
case SYNC_AP_CMD_EXIT: // Exit sync mode
simpliciti_flag |= SIMPLICITI_TRIGGER_STOP;
break;
}
}
//unsigned char sys_flash_write_operate(u32 Address,u16 * buff,u32 len)
unsigned char sys_flash_write_operate(u32 Address,u8 * buff,u32 len)
{
u32 bBeginPage,bEndPage;
unsigned char sPageBuf[2048];
u32 nCurAddress,nCurLen,nSize,i,nOffset;
//test
unsigned char j;
int bRet;
//if( Address<SysStartAddr || Address+len>SysEndAddr )
if( (Address+len+SysStartAddr)>SysEndAddr )
return ADDRESS_LEN_ERR;
bBeginPage = (Address+SysStartAddr)/FLASH_PAGE_SIZE;
//if( (Address+SysStartAddr)%FLASH_PAGE_SIZE)
// bBeginPage++;
bEndPage = (Address+SysStartAddr+len)/FLASH_PAGE_SIZE;
if( (Address+SysStartAddr+len)%FLASH_PAGE_SIZE)
bEndPage++;
nCurAddress = Address+SysStartAddr;
nCurLen = len;
nOffset = 0;
bRet = 0;
//13/06/24
FLASH_Unlock();
for(i=bBeginPage;i<bEndPage;i++)
{
bRet = flash_read_operate(i*FLASH_PAGE_SIZE,sPageBuf,FLASH_PAGE_SIZE);
bRet = CrcPageCmp(i-SysStartAddr/FLASH_PAGE_SIZE,sPageBuf);
//test
trace_debug_printf("CrcPageCmp[%d]\n",bRet);
bRet = flash_erase_page(i);
//13/07/09
if( (i<(SysStartAddr/FLASH_PAGE_SIZE +4)) && //save key page
memcmp(buff,"\x0\x0\x0\x0\x0\x0\x0\x0",8)!=0) //key data
bRet = flash_erase_page(i+PCI_BACK_ADDR/FLASH_PAGE_SIZE);
//liantest 13/05/31
if(bRet)
trace_debug_printf("flash_erase_page[%d]", bRet);
//nSize = nCurLen%FLASH_PAGE_SIZE;
nSize =FLASH_PAGE_SIZE- ((nCurAddress-SysStartAddr)%FLASH_PAGE_SIZE);
if(nSize>nCurLen)
nSize =nCurLen;
memcpy(&sPageBuf[nCurAddress%FLASH_PAGE_SIZE],(unsigned char *)&buff[nOffset],nSize);
j = 0;
bRet = CrcPageCalc(i-SysStartAddr/FLASH_PAGE_SIZE,sPageBuf);
//test
trace_debug_printf("CrcPageCalc[%d]\n",bRet);
WRITE:
bRet = flash_write_operate(i*FLASH_PAGE_SIZE,(unsigned short *)sPageBuf,FLASH_PAGE_SIZE);
//13/07/09
if( (i<(SysStartAddr/FLASH_PAGE_SIZE +4)) &&//save key page
memcmp(buff,"\x0\x0\x0\x0\x0\x0\x0\x0",8)!=0) //key data
bRet = flash_write_operate(i*FLASH_PAGE_SIZE+PCI_BACK_ADDR,(unsigned short *)sPageBuf,FLASH_PAGE_SIZE);
//liantest 13/05/31
if(bRet)
{
trace_debug_printf("number[%d] flash_write_operate[%d]", j,bRet);
delay_ms(50);
if(j++<4)
goto WRITE;
}
//13/07/01
bRet = flash_read_operate(i*FLASH_PAGE_SIZE,sPageBuf,FLASH_PAGE_SIZE);
bRet = CrcPageCmp(i-SysStartAddr/FLASH_PAGE_SIZE,sPageBuf);
//test
trace_debug_printf("CrcPageCmp[%d]\n",bRet);
//test
//bRet = flash_read_operate(i*FLASH_PAGE_SIZE,sPageBuf,FLASH_PAGE_SIZE);
nCurLen -= nSize;
nCurAddress += nSize;
nOffset +=nSize;
}
//13/06/24
FLASH_Lock();
return bRet;//13/05/31
}
unsigned char flash_op_test(void)
{
u8 buff[1024*2+11],ret=0;
u32 len=1024*2+2,i;
ret=flash_read_operate(StartAddr,buff,len);
memset(buff,0xa5,sizeof(buff));
ret=flash_write_operate(StartAddr,(u16 *)buff,len);
if(ret)
{
debug_printf(0,0,0,"flash_write_operate err1,ret:%d",ret);
ret=flash_erase_page(0);
if(ret)
{
debug_printf(0,0,0,"flash_erase_page err2,ret:%d",ret);
}
else
{
debug_printf(0,0,0,"flash_erase_page ok1");
flash_erase_page(1);
ret=flash_write_operate(StartAddr,(u16 *)buff,len);
if(ret)
{
debug_printf(0,0,0,"flash_write_operate err3,ret:%d",ret);
}
else
{
debug_printf(0,0,0,"flash_write_operate ok2");
memset(buff,0x00,sizeof(buff));
ret=flash_read_operate(StartAddr+1,buff,len);
if(ret)
{
debug_printf(0,0,0,"flash_read_operate err4,ret:%02x",ret);
}
else
{
debug_printf(0,0,0,"flash_read_operate ok3");
for(i=0;i<len;i++)
{
debug_printf(0,0,0," %02x ",buff[i]);
}
}
}
}
}
else
{
debug_printf(0,0,0,"flash_write_operate okx1");
memset(buff,0x00,sizeof(buff));
ret=flash_read_operate(StartAddr+1,buff,len);
if(ret)
{
debug_printf(0,0,0,"flash_read_operate errx1,ret:%02x",ret);
}
else
{
debug_printf(0,0,0,"flash_read_operate okx2");
for(i=0;i<len;i++)
{
debug_printf(0,0,0," %02x ",buff[i]);
}
}
}
return 0;
}
void
flash_func_erase_sector(unsigned sector)
{
if (sector < BOARD_FLASH_SECTORS)
flash_erase_page(APP_LOAD_ADDRESS + (sector * FLASH_SECTOR_SIZE));
}
/**
* \brief Application entry point for CRCCU example.
*
* \return Unused (ANSI-C compatibility).
*/
int main(void)
{
uint32_t ul_counter;
uint32_t ul_crc;
/* Initialize the system */
sysclk_init();
board_init();
/* Configure the console uart */
configure_console();
/* Output example information */
puts(STRING_HEADER);
/* Enable CRCCU peripheral clock */
pmc_enable_periph_clk(ID_CRCCU);
/* Initialize flash: 6 wait states for flash writing. */
flash_init(FLASH_ACCESS_MODE_128, FLASH_WAIT_STATE_NBR);
/* Unlock flash page. */
flash_unlock(FLASH_BUFFER_ADDRESS,
FLASH_BUFFER_ADDRESS + IFLASH_PAGE_SIZE - 1, NULL, NULL);
/* Fill data buffer in SRAM (The data may be random data) */
for (ul_counter = 0; ul_counter < BUFFER_LENGTH; ul_counter++) {
g_uc_data_buf[ul_counter] = ul_counter;
}
#if SAM4S || SAMG55
/* Fill data buffer in Flash, the data is same as in SRAM */
#if SAM4S
flash_erase_page(FLASH_BUFFER_ADDRESS,
IFLASH_ERASE_PAGES_8);
#else
flash_erase_page(FLASH_BUFFER_ADDRESS,
IFLASH_ERASE_PAGES_16);
#endif
flash_write(FLASH_BUFFER_ADDRESS,
(void *)g_uc_data_buf,
BUFFER_LENGTH, 0);
#else
flash_write(FLASH_BUFFER_ADDRESS,
(void *)g_uc_data_buf,
BUFFER_LENGTH, 1);
#endif
/* Test CRC with CCITT-16 polynomial */
puts("\n\r====Test CRC with CCITT 16 (0x1021) ====\r");
/* Compute CRC in SRAM */
puts("Test CRC in SRAM buffer\r");
ul_crc = compute_crc(g_uc_data_buf, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CCITT16);
/* Compute CRC in Flash and compare it with the result in SRAM */
puts("Test CRC in Flash buffer\r");
compute_crc_and_compare((uint8_t *) FLASH_BUFFER_ADDRESS, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CCITT16, ul_crc);
/* Test CRC with CASTAGNOLI polynomial */
puts("\n\r====Test CRC with CASTAGNOLI (0x1EDC6F41) ====\r");
/* Compute CRC in SRAM */
puts("Test CRC in SRAM buffer\r");
ul_crc = compute_crc(g_uc_data_buf, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CASTAGNOLI);
/* Compute CRC in Flash and compare it with the result in SRAM */
puts("Test CRC in Flash buffer\r");
compute_crc_and_compare((uint8_t *) FLASH_BUFFER_ADDRESS, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CASTAGNOLI, ul_crc);
/* Test CRC with CCITT 802.3 polynomial */
puts("\n\r====Test CRC with CCITT 802.3 (0x04C11DB7) ====\r");
/* Compute CRC in SRAM */
puts("Test CRC in SRAM buffer\r");
ul_crc = compute_crc(g_uc_data_buf, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CCITT8023);
/* Compute CRC in Flash and compare it with the result in SRAM */
puts("Test CRC in Flash buffer\r");
compute_crc_and_compare((uint8_t *) FLASH_BUFFER_ADDRESS, BUFFER_LENGTH,
CRCCU_MR_PTYPE_CCITT8023, ul_crc);
while (1) {
}
}
/**
* \brief Test GPBR read/write interfaces.
*
* \param test Current test case.
*/
static void run_gpbr_test(const struct test_case *test)
{
uint32_t ul_read_value = 0;
uint32_t ul_test_page_addr = TEST_PAGE_ADDRESS;
uint32_t *ul_back_mode_flag_addr = (uint32_t *) ul_test_page_addr;
uint32_t ul_normal_mode_flag = NORMAL_MODE_FLAG;
uint32_t ul_backup_mode_flag = BACKUP_MODE_FLAG;
uint8_t uc_write_success_flag = 1;
/* Initialize flash: 6 wait states for flash writing. */
flash_init(FLASH_ACCESS_MODE_128, FLASH_WAIT_STATE_NBR);
/* Unlock flash page. */
flash_unlock(ul_test_page_addr,
ul_test_page_addr + IFLASH_PAGE_SIZE - 1, NULL, NULL);
if ((*ul_back_mode_flag_addr) == BACKUP_MODE_FLAG) {
/* Read the data from GPBR0 */
ul_read_value = gpbr_read(GPBR0);
#if (SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV70 || SAMV71 || SAME70 || SAMS70)
/* Erase flag page */
flash_erase_page(ul_test_page_addr, IFLASH_ERASE_PAGES_8);
/* Clear backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *)&ul_normal_mode_flag,
sizeof(uint32_t), 0) != FLASH_RC_OK) {
uc_write_success_flag = 0;
}
#else
/* Clear backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *)&ul_normal_mode_flag,
sizeof(uint32_t), 1) != FLASH_RC_OK) {
uc_write_success_flag = 0;
}
#endif
/* Return test result */
test_assert_true(test, (ul_read_value == GPBR_UNIT_TEST_CONST_DATA)
&& uc_write_success_flag, "Test GPBR: GPBR write error!");
/* Clear GPBR 0 */
gpbr_write(GPBR0, 0);
return;
}
/* Write the data to the backup register 0 */
gpbr_write(GPBR0, GPBR_UNIT_TEST_CONST_DATA);
/* Enable RTT wake up */
supc_set_wakeup_mode(SUPC, SUPC_WUMR_RTTEN);
/* Configure RTT */
gpbr_test_configure_rtt();
/* Wait for RTT alarm event */
rtt_write_alarm_time(RTT, RTT_WAIT_TIME);
#if (SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV70 || SAMV71 || SAME70 || SAMS70)
/* Erase flag page */
if(flash_erase_page(ul_test_page_addr, IFLASH_ERASE_PAGES_8) != FLASH_RC_OK)
printf("erase page failed!\r\n");
/* Write backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *) & ul_backup_mode_flag,
sizeof(uint32_t), 0) != FLASH_RC_OK) {
/* Flag write failed, return error */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}
#else
/* Write backup mode flag */
if (flash_write(ul_test_page_addr, (uint8_t *) & ul_backup_mode_flag,
sizeof(uint32_t), 1) != FLASH_RC_OK) {
/* Flag write failed, return error */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}
#endif
/* Enter backup mode */
pmc_enable_backupmode();
#if (!(SAM4S) && !(SAM4E) && !(SAM4N) && !(SAM4C) && !(SAM4CP) && !(SAM4CM) && !(SAMV70) && !(SAMV71) && !(SAME70) && !(SAMS70))
supc_enable_backup_mode(SUPC);
#endif
/* We should never reach here */
test_assert_true(test, 0, "Test GPBR: GPBR write error!");
}