Example #1
0
int
GetMpuType(struct wacom_i2c *wac_i2c, int *pMpuType)
{
    int rv;

    if (!flash_query(wac_i2c)) {
        if (!wacom_i2c_flash_cmd(wac_i2c))
            return EXIT_FAIL_ENTER_FLASH_MODE;
        else {
            msleep(100);
            if (!flash_query(wac_i2c))
                return EXIT_FAIL_FLASH_QUERY;
        }
    }

    rv = flash_mputype(wac_i2c, pMpuType);
    if (rv)
        return EXIT_OK;
    else
        return EXIT_FAIL_GET_MPU_TYPE;
}
Example #2
0
int
GetBLVersion(struct wacom_i2c *wac_i2c, int* pBLVer)
{
	int rv;
	wacom_i2c_flash_cmd_g9(wac_i2c);
	if (!flash_query(wac_i2c)) {
		if (!wacom_i2c_flash_cmd_g9(wac_i2c)) {
			return EXIT_FAIL_ENTER_FLASH_MODE;
		}
		else {
			msleep(100);
			if (!flash_query(wac_i2c)){
				return EXIT_FAIL_FLASH_QUERY;
			}
		}
	}

	rv = flash_blver(wac_i2c, pBLVer);
 	if (rv)
		return EXIT_OK;
	else
		return EXIT_FAIL_GET_BOOT_LOADER_VERSION;
}
int wacom_i2c_flash(struct wacom_i2c *wac_i2c)
{
	int ret;

	fw_data = wac_i2c->fw_img->data;
	if (fw_data == NULL) {
		printk(KERN_ERR "epen:Data is NULL. Exit.\n");
		return -1;
	}

	wac_i2c->pdata->compulsory_flash_mode(true);
	wac_i2c->pdata->reset_platform_hw();
	msleep(200);

	ret = wacom_flash_cmd(wac_i2c);
	if (ret < 0) {
		printk(KERN_DEBUG"epen:%s cannot send flash command \n", __func__);
	}

	ret = flash_query(wac_i2c);
	if (ret < 0) {
		printk(KERN_DEBUG"epen:%s Error: cannot send query \n", __func__);
		ret = -EXIT_FAIL;
		goto end_wacom_flash;
	}

	ret = wacom_i2c_flash_w9012(wac_i2c, fw_data);
	if (ret < 0) {
		printk(KERN_DEBUG"epen:%s Error: flash failed \n", __func__);
		ret = -EXIT_FAIL;
		goto end_wacom_flash;
	}

 end_wacom_flash:
	wac_i2c->pdata->compulsory_flash_mode(false);
	wac_i2c->pdata->reset_platform_hw();
	msleep(200);

	return ret;
}
static int GetBLVersion(struct wacom_i2c *wac_i2c, int *pBLVer)
{
	int rv;
	int retry = 0;

	rv = wacom_flash_cmd(wac_i2c);
	if (rv < 0)
		msleep(500);

	do {
		msleep(100);
		rv = flash_query(wac_i2c);
		retry++;
	} while (rv < 0 && retry < 10);

	if (rv < 0)
		return EXIT_FAIL_GET_BOOT_LOADER_VERSION;

	rv = flash_blver(wac_i2c, pBLVer);
	if (rv)
		return EXIT_OK;
	else
		return EXIT_FAIL_GET_BOOT_LOADER_VERSION;
}
// Initialize the hardware. Make sure we have a flash device we know
// how to program and determine its size, the size of the blocks, and
// the number of blocks. The query function returns the chip ID 1
// register which tells us about the CPU we are running on, the flash
// size etc. Use this information to determine we have a valid setup.
int 
flash_hwr_init(void){

  cyg_uint32 chipID1r;
  cyg_uint32 flash_mode;
  cyg_uint8  fmcn;
  cyg_uint32 lock_bits;
  
  flash_query (&chipID1r);

  if ((chipID1r & AT91_DBG_C1R_CPU_MASK) != AT91_DBG_C1R_ARM7TDMI)
    goto out;

  if (((chipID1r & AT91_DBG_C1R_ARCH_MASK) != AT91_DBG_C1R_ARCH_AT91SAM7Sxx) &&
      ((chipID1r & AT91_DBG_C1R_ARCH_MASK) != AT91_DBG_C1R_ARCH_AT91SAM7Xxx) &&
      ((chipID1r & AT91_DBG_C1R_ARCH_MASK) != AT91_DBG_C1R_ARCH_AT91SAM7XC) &&
      ((chipID1r & AT91_DBG_C1R_ARCH_MASK) != AT91_DBG_C1R_ARCH_AT91SAM7SExx))
    goto out;
  
  if ((chipID1r & AT91_DBG_C1R_FLASH_MASK) == AT91_DBG_C1R_FLASH_0K)
    goto out;
  

  if ((chipID1r & AT91_DBG_C1R_NVPTYP_MASK) != AT91_DBG_C1R_NVPTYP_ROMFLASH)
  {
  switch (chipID1r & AT91_DBG_C1R_FLASH_MASK) {
    case AT91_DBG_C1R_FLASH_32K:
      flash_info.block_size = 128;
      flash_info.blocks = 256;
      lock_bits = 8;
      break;
    case AT91_DBG_C1R_FLASH_64K:
      flash_info.block_size = 128;
      flash_info.blocks = 512;
      lock_bits = 16;
      break;
    case AT91_DBG_C1R_FLASH_128K:
      flash_info.block_size = 256;
      flash_info.blocks = 512;
      lock_bits = 8;
      break;
    case AT91_DBG_C1R_FLASH_256K:
      flash_info.block_size = 256;
      flash_info.blocks = 1024;
      lock_bits = 16;
      break;
#ifdef AT91_MC_FMR1
		case AT91_DBG_C1R_FLASH_512K:
		  flash_info.block_size = 256;
		  flash_info.blocks = 1024;
		  lock_bits = 16;
		  (*flash_info.pf)("at91_flash: Only EFC0 is supported for writes and locks");
		  //flash_info.blocks = 2048;
		  //lock_bits = 32;
		  break;
#endif
		default:
		  goto out;
	  }
  } else {
	  // if there is both flash & ROM then: ROM=AT91_DBG_C1R_FLASH, flash=AT91_DBG_C1R_FLASH2
	  switch (chipID1r & AT91_DBG_C1R_FLASH2_MASK) {
		case AT91_DBG_C1R_FLASH2_32K:
		  flash_info.block_size = 128;
		  flash_info.blocks = 256;
		  lock_bits = 8;
		  break;
		case AT91_DBG_C1R_FLASH2_64K:
		  flash_info.block_size = 128;
		  flash_info.blocks = 512;
		  lock_bits = 16;
		  break;
		case AT91_DBG_C1R_FLASH2_128K:
		  flash_info.block_size = 256;
		  flash_info.blocks = 512;
		  lock_bits = 8;
		  break;
		case AT91_DBG_C1R_FLASH2_256K:
		  flash_info.block_size = 256;
		  flash_info.blocks = 1024;
		  lock_bits = 16;
		  break;
#ifdef AT91_MC_FMR1
		case AT91_DBG_C1R_FLASH2_512K:
		  flash_info.block_size = 256;
		  flash_info.blocks = 1024;
		  lock_bits = 16;
		  (*flash_info.pf)("at91_flash: Only EFC0 is supported for writes and locks");
		  //flash_info.blocks = 2048;
		  //lock_bits = 32;
		  break;
#endif
    default:
      goto out;
  }
  }
  flash_info.buffer_size = 0;
  flash_info.start = (void *) 0x00100000;
  flash_info.end = (void *)(((cyg_uint32) flash_info.start) + 
                            flash_info.block_size * flash_info.blocks);
#ifdef CYGBLD_DEV_FLASH_AT91_LOCKING
  sector_size = flash_info.block_size * flash_info.blocks / lock_bits;
#endif
  // Set the FLASH clock to 1.5 microseconds based on the MCLK.  This
  // assumes the CPU is still running from the PLL clock as defined in
  // the HAL CDL and the HAL startup code. 
  fmcn = CYGNUM_HAL_ARM_AT91_CLOCK_SPEED * 1.5 / 1000000 + 0.999999; // We must round up!
  HAL_READ_UINT32(AT91_MC+AT91_MC_FMR, flash_mode);
  flash_mode = flash_mode & ~AT91_MC_FMR_FMCN_MASK;
  flash_mode = flash_mode | (fmcn << AT91_MC_FMR_FMCN_SHIFT);
  HAL_WRITE_UINT32(AT91_MC+AT91_MC_FMR, flash_mode);
#ifdef AT91_MC_FMR1
  HAL_READ_UINT32(AT91_MC+AT91_MC_FMR1, flash_mode);
  flash_mode = flash_mode & ~AT91_MC_FMR_FMCN_MASK;
  flash_mode = flash_mode | (fmcn << AT91_MC_FMR_FMCN_SHIFT);
  HAL_WRITE_UINT32(AT91_MC+AT91_MC_FMR1, flash_mode);
#endif
  
  return FLASH_ERR_OK;
  
 out:
  (*flash_info.pf)("Can't identify FLASH, sorry, ChipID1 %x\n",
                   chipID1r );
  return FLASH_ERR_HWR;
}