int fpc1020_capture_set_sample_mode(fpc1020_data_t* fpc1020, bool single) { int error = 0; fpc1020_reg_access_t reg; u8 image_setup; u8 image_rd; dev_dbg(&fpc1020->spi->dev, "%s single %s\n", __func__, single ? "true" : "false"); if (single) { image_setup = 0x0A; image_rd = 0x0C; } else { image_setup = 0x03 | 0x08; image_rd = 0x0E; } FPC1020_MK_REG_WRITE(reg, FPC102X_REG_IMAGE_SETUP, &image_setup); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out_err; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_IMG_RD, &image_rd); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out_err; out_err: if (error) dev_err(&fpc1020->spi->dev, "%s Error %d\n", __func__, error); return error; }
int fpc1020_write_test_setup(fpc1020_data_t *fpc1020, u16 pattern) { int error = 0; u8 config = 0x04; fpc1020_reg_access_t reg; dev_dbg(&fpc1020->spi->dev, "%s, pattern 0x%x\n", __func__, pattern); error = fpc1020_write_sensor_setup(fpc1020); if (error) goto out; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_TST_COL_PATTERN_EN, &pattern); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_FINGER_DRIVE_CONF, &config); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; error = fpc1020_capture_settings(fpc1020, 0); if (error) goto out; out: return error; }
int fpc1020_write_cb_test_setup(fpc1020_data_t *fpc1020, bool invert) { int error = 0; u8 temp_u8; u16 temp_u16; u64 temp_u64; fpc1020_reg_access_t reg; temp_u16 = (invert) ? 0x55aa : 0xaa55; dev_dbg(&fpc1020->spi->dev, "%s, pattern 0x%x\n", __func__, temp_u16); FPC1020_MK_REG_WRITE(reg, FPC102X_REG_TST_COL_PATTERN_EN, &temp_u16); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u8 = 0x04; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_FINGER_DRIVE_CONF, &temp_u8); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u16 = (invert) ? 0x0f1b : 0x0f0f; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_PXL_CTRL, &temp_u16); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u16 = (invert) ? 0x0800 : 0x00; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_ADC_SHIFT_GAIN, &temp_u16); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u8 = 0x14; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_PXL_RST_DLY, &temp_u8); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u8 = 0x20; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_FINGER_DRIVE_DLY, &temp_u8); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; temp_u64 = 0x1e1e1e1e2d2d2d2d; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_SAMPLE_PX_DLY, &temp_u64); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out; out: return error; }
int fpc1020_capture_settings(fpc1020_data_t *fpc1020, int select) { int error = 0; fpc1020_reg_access_t reg; u16 pxlCtrl; u16 adc_shift_gain; dev_dbg(&fpc1020->spi->dev, "%s #%d\n", __func__, select); if (select >= FPC1020_MAX_ADC_SETTINGS) { error = -EINVAL; goto out_err; } pxlCtrl = fpc1020->setup.pxl_ctrl[select]; pxlCtrl |= FPC1020_PXL_BIAS_CTRL; adc_shift_gain = fpc1020->setup.adc_shift[select]; adc_shift_gain <<= 8; adc_shift_gain |= fpc1020->setup.adc_gain[select]; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_PXL_CTRL, &pxlCtrl); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out_err; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_ADC_SHIFT_GAIN, &adc_shift_gain); error = fpc1020_reg_access(fpc1020, ®); if (error) goto out_err; out_err: if (error) dev_err(&fpc1020->spi->dev, "%s Error %d\n", __func__, error); return error; }
int fpc1020_capture_set_crop(fpc1020_data_t *fpc1020, int first_column, int num_columns, int first_row, int num_rows) { fpc1020_reg_access_t reg; u32 temp_u32; temp_u32 = first_row; temp_u32 <<= 8; temp_u32 |= num_rows; temp_u32 <<= 8; temp_u32 |= (first_column * fpc1020->chip.adc_group_size); temp_u32 <<= 8; temp_u32 |= (num_columns * fpc1020->chip.adc_group_size); FPC1020_MK_REG_WRITE(reg,FPC102X_REG_IMG_CAPT_SIZE, &temp_u32); return fpc1020_reg_access(fpc1020, ®); }
/* -------------------------------------------------------------------- */ static int fpc1020_write_nav_setup(fpc1020_data_t* fpc1020) { const int mux = 2; int error = 0; u16 temp_u16; u32 temp_u32; u8 temp_u8; fpc1020_reg_access_t reg; dev_dbg(&fpc1020->spi->dev, "%s %d\n", __func__, mux); #if 1 error = fpc1020_wake_up(fpc1020); if (error) { goto out; } error = fpc1020_write_sensor_setup(fpc1020); if (error) { goto out; } #endif #if 0 temp_u16 = fpc1020->setup.adc_shift[mux]; temp_u16 <<= 8; temp_u16 |= fpc1020->setup.adc_gain[mux]; #else temp_u16 = 8; temp_u16 <<= 8; temp_u16 |= 5; #endif FPC1020_MK_REG_WRITE(reg, FPC102X_REG_ADC_SHIFT_GAIN, &temp_u16); error = fpc1020_reg_access(fpc1020, ®); if (error) { goto out; } //temp_u16 = fpc1020->setup.pxl_ctrl[mux]; temp_u16 = 0x0f1f; FPC1020_MK_REG_WRITE(reg, FPC102X_REG_PXL_CTRL, &temp_u16); error = fpc1020_reg_access(fpc1020, ®); if (error) { goto out; } error = fpc1020_capture_set_crop(fpc1020, NAV_IMG_CROP_X / fpc1020->chip.adc_group_size, NAV_IMG_CROP_W / fpc1020->chip.adc_group_size, NAV_IMG_CROP_Y, NAV_IMG_CROP_H); if (error) { goto out; } // Setup skipping of rows switch (NAV_IMG_ROW_SKIP) { case 1: temp_u32 = 0; break; case 2: temp_u32 = 1; break; case 4: temp_u32 = 2; break; case 8: temp_u32 = 3; break; default: error = -EINVAL; break; } if (error) { goto out; } temp_u32 <<= 8; // Setup masking of columns switch (NAV_IMG_COL_MASK) { case 1: temp_u32 |= 0xff; break; case 2: temp_u32 |= 0xcc; break; case 4: temp_u32 |= 0x88; break; case 8: temp_u32 |= 0x80; break; default: error = -EINVAL; break; } if (error) { goto out; } temp_u32 <<= 8; temp_u32 |= 0; // No multisampling FPC1020_MK_REG_WRITE(reg, FPC102X_REG_IMG_SMPL_SETUP, &temp_u32); error = fpc1020_reg_access(fpc1020, ®); if (error) { goto out; } temp_u8 = 0x08; FPC1020_MK_REG_WRITE(reg, FPC1020_REG_FNGR_DET_THRES, &temp_u8); error = fpc1020_reg_access(fpc1020, ®); dev_dbg(&fpc1020->spi->dev, "%s, (%d, %d, %d, %d)\n", __func__, fpc1020->nav.image_nav_col_start, fpc1020->nav.image_nav_col_groups, fpc1020->nav.image_nav_row_start, fpc1020->nav.image_nav_row_count); out: return error; }