void generate_fake_intel_oprom(const struct i915_gpu_controller_info *conf, struct device *dev, const char *idstr) { optionrom_header_t *oh = (void *)PCI_VGA_RAM_IMAGE_START; optionrom_pcir_t *pcir; size_t vbt_size; size_t fake_oprom_size; memset(oh, 0, 8192); oh->signature = PCI_ROM_HDR; oh->pcir_offset = 0x40; oh->vbt_offset = 0x80; pcir = (void *)(PCI_VGA_RAM_IMAGE_START + 0x40); pcir->signature = 0x52494350; // PCIR pcir->vendor = dev->vendor; pcir->device = dev->device; pcir->length = sizeof(*pcir); pcir->revision = dev->class; pcir->classcode[0] = dev->class >> 8; pcir->classcode[1] = dev->class >> 16; pcir->classcode[2] = dev->class >> 24; pcir->indicator = 0x80; vbt_size = generate_vbt (conf, (void *)(PCI_VGA_RAM_IMAGE_START + 0x80), idstr); fake_oprom_size = (0x80 + vbt_size + 511) / 512; oh->size = fake_oprom_size; pcir->imagelength = fake_oprom_size; }
void generate_fake_intel_oprom(const struct i915_gpu_controller_info *const conf, struct device *const dev, const char *const idstr) { optionrom_header_t *const oh = (void *)PCI_VGA_RAM_IMAGE_START; memset(oh, 0, 8192); oh->signature = PCI_ROM_HDR; oh->pcir_offset = 0x40; oh->vbt_offset = 0x80; optionrom_pcir_t *const pcir = (void *)((u8 *)oh + oh->pcir_offset); pcir->signature = 0x52494350; // PCIR pcir->vendor = dev->vendor; pcir->device = dev->device; pcir->length = sizeof(*pcir); pcir->revision = pci_read_config8(dev, PCI_CLASS_REVISION); pcir->classcode[0] = dev->class; pcir->classcode[1] = dev->class >> 8; pcir->classcode[2] = dev->class >> 16; pcir->indicator = 0x80; const size_t vbt_size = generate_vbt(conf, (void *)((u8 *)oh + oh->vbt_offset), idstr); const size_t fake_oprom_size = DIV_ROUND_UP(oh->vbt_offset + vbt_size, 512); oh->size = fake_oprom_size; pcir->imagelength = fake_oprom_size; }