//! \brief Maps a register # to a string //! //! @param targetType = target type (T_HC12 etc) //! @param regNo = register address //! //! @return pointer to static string describing the command //! char const *getRegName( unsigned int targetType, unsigned int regNo ){ switch (targetType) { case T_HC12 : return getHCS12RegName(regNo); case T_HCS08 : return getHCS08RegName(regNo); case T_RS08 : return getRS08RegName(regNo); break; case T_CFV1 : return getCFV1RegName(regNo); case T_CFVx : return getCFVxRegName(regNo); case T_ARM_JTAG : return getARMRegName(regNo); case T_ARM_SWD : return getARMRegName(regNo); case T_MC56F80xx: return getDSCRegName(regNo); }; return "Invalid target!"; }
//! 2.2.6.1 Write Value to Register //! //! @param dnRegNumber //! @param drvValue //! USBDM_GDI_DECLSPEC DiReturnT DiRegisterWrite ( DiUInt32T dnRegNumber, DiRegisterValueT drvValue ) { LOGGING; U32c value(drvValue); USBDM_ErrorCode rc = BDM_RC_OK; log.print("(0x%X(%d) <= 0x%08X)\n", dnRegNumber, dnRegNumber, (uint32_t)value); CHECK_ERROR_STATE(); if (dnRegNumber>cfv1regID_FIRST_DEBUG_regID_BYTE) { switch (dnRegNumber) { case cfv1regID_xcsr_byte : rc = USBDM_WriteControlReg(value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", "XCSR.byte", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } break; case cfv1regID_csr2_byte : rc = USBDM_WriteDReg(CFV1_DRegCSR2byte,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", "CSR2.byte", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } break; case cfv1regID_csr3_byte : rc = USBDM_WriteDReg(CFV1_DRegCSR3byte,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", "CSR3.byte", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } break; default : log.print("DiRegisterWrite(Illegal Reg# 0x%X(%d)\n", dnRegNumber, dnRegNumber); rc = BDM_RC_ILLEGAL_PARAMS; break; } } else if (dnRegNumber>cfv1regID_FIRST_DEBUG_REG) { int regNum = dnRegNumber-cfv1regID_FIRST_DEBUG_REG; rc = USBDM_WriteDReg(regNum,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", getCFV1DebugRegName(regNum), dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } } else if (dnRegNumber > cfv1regID_FIRST_CONTROL_REG) { int regNum = dnRegNumber-cfv1regID_FIRST_CONTROL_REG; rc = USBDM_WriteCReg(regNum,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", getCFV1ControlRegName(regNum), dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } } else { switch (dnRegNumber) { case cfv1regID_pc : /* PC */ if (!pcWritten) { log.print("Saving initial PC write = 0x%08X)\n", (uint32_t)value); pcWritten = true; pcResetValue = value; } rc = USBDM_WriteCReg(CFV1_CRegPC,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", "PC", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } break; case cfv1regID_sr : rc = USBDM_WriteCReg(CFV1_CRegSR,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", "SR", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } break; default : // D0-7, A0-7 if (dnRegNumber>15) { log.print("DiRegisterWrite(Illegal Reg# 0x%X(%d)\n", dnRegNumber, dnRegNumber); rc = BDM_RC_ILLEGAL_PARAMS; } else { rc = USBDM_WriteReg(dnRegNumber,value); if (rc != BDM_RC_OK) { log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n", getCFV1RegName(dnRegNumber), dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } } break; } } if (rc != BDM_RC_OK) { log.error("0x%X Failed, reason= %s\n", dnRegNumber, USBDM_GetErrorString(rc)); return setErrorState(DI_ERR_NONFATAL, rc); } return setErrorState(DI_OK); }