Example #1
0
void fillMesh(Geometry *geometry)
{
  const char routineName[] = "fillMesh";
  register int mu, k, l, m;
 
  int    quadrant;
  double mux, muy, muz, dz, frac1, frac2, longfracx, longfracy;
  enum intersect plane;

  getCPU(2, TIME_START, NULL);
 
  if (geometry->x_boundary != PERIODIC ||
      geometry->y_boundary != PERIODIC) {
    Error(ERROR_LEVEL_2, routineName, 
	  "Horizontal boundary conditions in x AND y must be PERIODIC");
  }
  /* --- Allocate space for interpolation stencils and longchar
         structures --                                 -------------- */

  geometry->stencil_uw =
    (Stencil **) malloc(geometry->Nrays * sizeof(Stencil *));
  geometry->stencil_dw =
    (Stencil **) malloc(geometry->Nrays * sizeof(Stencil *));

  for (mu = 0;  mu < geometry->Nrays;  mu++) {
    geometry->stencil_uw[mu] =
      (Stencil *) malloc(geometry->Nz * sizeof(Stencil));
    geometry->stencil_dw[mu] =
      (Stencil *) malloc(geometry->Nz * sizeof(Stencil));
  }
  geometry->Nlongchar = 0;
   
  /* --- Evaluate the interpolation bases and kernels for linear
         interpolation or cubic convolution. In general we sweep DOWN
         and then UP. The convention here will be that we store the
         UPWIND base for the DOWN sweep in the uw_stencil array, and the
         DOWNWIND in the dw_stencil array. For the UP sweep UPWIND and
         DOWNWIND are reversed. --                     -------------- */

  for (mu = 0;  mu < geometry->Nrays;  mu++) {
    for (k = 1;  k < geometry->Nz;  k++) {

      /* --- First, the UPWIND bases for the DOWN sweep. These will be
             the DOWNWIND bases for the final UP sweep. -- ---------- */ 

      setStencil(geometry, mu, k, UPWIND);
    }
    for (k = 0;  k < geometry->Nz - 1;  k++) {
      setStencil(geometry, mu, k, DOWNWIND);
    }
  }
  if (geometry->Nlongchar) {
    sprintf(messageStr, "\n-Used %d Long Characteristics\n\n",
	    geometry->Nlongchar);
    Error(MESSAGE, NULL, messageStr);
  }
  getCPU(2, TIME_POLL, "Geometry");
}
Example #2
0
AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
                                   StringRef CPU, StringRef FS,
                                   const TargetOptions &Options,
                                   Optional<Reloc::Model> RM, CodeModel::Model CM,
                                   CodeGenOpt::Level OL)
    : LLVMTargetMachine(
          T, AVRDataLayout, TT,
          getCPU(CPU), FS, Options, getEffectiveRelocModel(RM), CM, OL),
      SubTarget(TT, getCPU(CPU), FS, *this) {
  this->TLOF = make_unique<AVRTargetObjectFile>();
  initAsmInfo();
}
Example #3
0
static char * NOP1() {
    CPU *c = getCPU();
    uint16_t address = 0xFFFF;
    int8_t operand = 0xFF;
    OP_CODE_INFO *o = getOP_CODE_INFO(operand,address,modeImmediate);
    int8_t statusBef = getRegByte(c,STATUS);
    int8_t stackBef = getRegByte(c,STACK);
    int8_t accumBef = getRegByte(c,ACCUM);
    int8_t indXBef = getRegByte(c,IND_X);
    int8_t indYBef = getRegByte(c,IND_Y);
    uint16_t PCBef = c->PC;
    nop(c,o);
    int8_t statusAft = getRegByte(c,STATUS);
    int8_t stackAft = getRegByte(c,STACK);
    int8_t accumAft = getRegByte(c,ACCUM);
    int8_t indXAft = getRegByte(c,IND_X);
    int8_t indYAft = getRegByte(c,IND_Y);
    uint16_t PCAft = c->PC;
    mu_assert("NOP1 err, STATUS reg changed", statusBef == statusAft);
    mu_assert("NOP1 err, STACK reg changed", stackBef == stackAft);
    mu_assert("NOP1 err, ACCUM reg changed", accumBef == accumAft);
    mu_assert("NOP1 err, IND_X reg changed", indXBef == indXAft);
    mu_assert("NOP1 err, IND_Y reg changed", indYBef == indYAft);
    mu_assert("NOP1 err, PC changed", PCBef == PCAft);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #4
0
void NCbmHandler::handleVic3MapC65(BYTE d030Byte)
{
  bool problem=false;
  DEBUG_OUT<<"Vic3 d030 set to "<<aDefaultStringHelper.myHex((unsigned char)d030Byte)<<"\n";
  // TODO: what are the other roms the vic chip manages?
  if(d030Byte&4) ((NCbmIO *)myIO)->colorRamExtend=true;
  else ((NCbmIO *)myIO)->colorRamExtend=false;
  if(d030Byte&2) ((NCbmIO *)myIO)->paletteMode=true;
  else ((NCbmIO *)myIO)->paletteMode=false;
  ERom *foo=(ERom *)NULL;
  if(d030Byte&0x80) { DEBUG_OUT<<"ROM@e000\n";  problem=true; }
  if(d030Byte&0x10) { DEBUG_OUT<<"ROM@a000\n";  problem=true; }
  if(d030Byte&0x08) { DEBUG_OUT<<"ROM@8000\n";  problem=true; }
  if(d030Byte&0x20) {
    if(!c65magic) {
      DEBUG_OUT<<"MAGIC@c000 (magic) swapped in\n";
      foo=(ERom *)map->findArea("magic.rom");
      if(foo) map->map(foo);
      c65magic=true;
    }
  }
  else {
    if(c65magic) {
      DEBUG_OUT<<"MAGIC@c000 (magic) swapped out\n";
      foo=(ERom *)map->findArea("magic.rom");
      if(foo) map->unmap(foo);
      c65magic=false;
    }
  }
  if(problem) getCPU()->debugger("Vic-3 0xd030 problem!");
}
Example #5
0
static char * SEI1() {
    CPU *c = getCPU();
    OP_CODE_INFO *o = getOP_CODE_INFO(0, 0, modeImplied);
    sei(c,o);
    mu_assert("SEI1 err, INTERRUPT != 1", getFlag(c,I) == 1);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #6
0
static char * SED1() {
    CPU *c = getCPU();
    OP_CODE_INFO *o = getOP_CODE_INFO(0, 0, modeImplied);
    sed(c,o);
    mu_assert("SED1 err, DEC != 1", getFlag(c,D) == 1);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #7
0
static char * SEC1() {
    CPU *c = getCPU();
    OP_CODE_INFO *o = getOP_CODE_INFO(0,0,modeImmediate);
    sec(c,o);
    mu_assert("SEC1 err, Carry flag != 1", getFlag(c,C) == 1);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #8
0
static char * TSX1() {
    CPU *c = getCPU();
    setRegByte(c,STACK,0x99);
    OP_CODE_INFO *o = getOP_CODE_INFO(0, 0, modeImplied);
    tsx(c,o);
    mu_assert("TXS1 err, STACK != 0x99", (getRegByte(c,IND_X)&0xFF) == 0x99);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #9
0
static char * JMP1() {
    CPU *c = getCPU();
    uint16_t address = 0xCFEE;
    OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
    jmp(c,o);
    mu_assert("JMP1 err, PC != 0xCFEE", c->PC == 0xCFEE);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #10
0
static char * ADC2() {
    //adding positive to negative, no overflow, yes carry
    CPU *c = getCPU();
    int8_t accumVal = testADCHelper(c,-39,92);
    mu_assert("ADC2 err, ACCUM reg != 53", accumVal == 53);
    mu_run_test_with_args(testRegStatus,c,"00100001",
            "          NVUBDIZC    NVUBDIZC\nADC2 err, %s != %s");
    free(c);
    return 0;
}
Example #11
0
static char * ADC4() {
    //adding negatives, yes overflow, yes carry
    CPU *c = getCPU();
    int8_t accumVal = testADCHelper(c,-103,-69);
    mu_assert("ADC4 err, ACCUM reg != 84", accumVal == 84);
    mu_run_test_with_args(testRegStatus,c,"01100001",
            "          NVUBDIZC    NVUBDIZC\nADC4 err, %s != %s");
    free(c);
    return 0;
}
Example #12
0
static char * ADC3() {
    //adding positives, yes overflow, no carry
    CPU *c = getCPU();
    int8_t accumVal = testADCHelper(c,104,45);
    mu_assert("ADC3 err, ACCUM reg != -107", accumVal == -107);
    mu_run_test_with_args(testRegStatus,c,"11100000",
            "          NVUBDIZC    NVUBDIZC\nADC3 err, %s != %s");
    free(c);
    return 0;
}
Example #13
0
static char * ADC1() {
    //adding positives, no overflow, no carry
    CPU *c = getCPU();
    int8_t accumVal = testADCHelper(c,13,14);
    mu_assert("ADC1 err, ACCUM reg != 27", accumVal == 27);
    mu_run_test_with_args(testRegStatus,c,"00100000",
            "          NVUBDIZC    NVUBDIZC\nADC1 err, %s != %s");
    free(c);
    return 0;
}
Example #14
0
static char * SBC5() {
    //pos ACUM, neg operand, no overflow, carry flag zeroed
    CPU *c = getCPU();
    setFlag(c,C,0);
    int8_t accumVal = testSBCHelper(c,30,-12);
    mu_assert("SBC5 err, ACCUM reg != 41", accumVal == 41);
    mu_run_test_with_args(testRegStatus,c,"00100000",
            "          NVUBDIZC    NVUBDIZC\nSBC5 err, %s != %s");
    free(c);
    return 0;
}
Example #15
0
static char * SBC4() {
    //neg ACUM, pos operand, yes overflow, yes carry
    CPU *c = getCPU();
    setFlag(c,C,1);
    int8_t accumVal = testSBCHelper(c,-103,69);
    mu_assert("SBC4 err, ACCUM reg != 84", accumVal == 84);
    mu_run_test_with_args(testRegStatus,c,"01100001",
            "          NVUBDIZC    NVUBDIZC\nSBC4 err, %s != %s");
    free(c);
    return 0;
}
Example #16
0
static char * SBC3() {
    //pos ACUM, neg operand, yes overflow, no carry
    CPU *c = getCPU();
    setFlag(c,C,1);
    int8_t accumVal = testSBCHelper(c,104,-45);
    mu_assert("SBC3 err, ACCUM reg != -105", accumVal == -107);
    mu_run_test_with_args(testRegStatus,c,"11100000",
            "          NVUBDIZC    NVUBDIZC\nSBC3 err, %s != %s");
    free(c);
    return 0;
}
Example #17
0
static char * SBC1() {
    //pos ACUM, neg operand, no overflow, no carry
    CPU *c = getCPU();
    setFlag(c,C,1);
    int8_t accumVal = testSBCHelper(c,13,-14);
    mu_assert("SBC1 err, ACCUM reg != 27", accumVal == 27);
    mu_run_test_with_args(testRegStatus,c,"00100000",
            "          NVUBDIZC    NVUBDIZC\nSBC1 err, %s != %s");
    free(c);
    return 0;
}
Example #18
0
void initScatter()
{
  const char routineName[] = "initScatter";
  register int n, kr, niter;

  double dJmax;
  Atom *atom;
  AtomicLine *line;

  /* --- Fill the radiative rates from previous solution if 
         PRD lines are present --                      -------------- */

  if (atmos.NPRDactive > 0  && input.startJ == OLD_J) {
    for (n = 0;  n < atmos.Natom;  n++) {
      atom = &atmos.atoms[n];
      if (atom->active) {
	readRadRate(atom);
	for (kr = 0;  kr < atom->Nline;  kr++) {
	  line = atom->line + kr;
	  if (line->PRD) {
	    switch (input.PRD_angle_dep) {
	    case PRD_ANGLE_INDEP:
	      PRDScatter(line, LINEAR);
	      break;
	    case PRD_ANGLE_APPROX:
	      PRDAngleApproxScatter(line, LINEAR);
	      break;
	    case PRD_ANGLE_DEP:
	      PRDAngleScatter(line, LINEAR);
	      break;
	    }
	  }
	}
      }
    }
  }
  /* --- Iterate the scattering in the background. Only iterate
         when we are also planning to do main iterations -- --------- */

  if (spectrum.updateJ) {
    sprintf(messageStr,
	    " %s: Lambda iterating background scattering...\n\n",
	    routineName);
    Error(MESSAGE, routineName, messageStr);

    niter = 0;
    while (input.NmaxIter  &&  niter < input.NmaxScatter) {
      dJmax = solveSpectrum(FALSE, FALSE);
      if (dJmax < input.iterLimit) break;
      niter++;
    }
  }
  getCPU(2, TIME_POLL, "Initial solution");
}
Example #19
0
static char * ROR1() {
    CPU *c = getCPU();
    setRegByte(c, ACCUM, 0xA1);
    OP_CODE_INFO *o = getOP_CODE_INFO(getRegByte(c,ACCUM) & 0xFF, 0, modeAccumulator);
    ror(c,o);
    mu_assert("ROR1 err, ACCUM != 0x50", (0xFF & getRegByte(c,ACCUM)) == 0x50);
    mu_assert("ROR1 err, CARRY != 1", getFlag(c,C) == 1);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #20
0
static char * BEQ2() {
    CPU *c = getCPU();
    uint16_t address = 0x1111;
    OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
    setFlag(c,Z,0);
    beq(c,o);
    mu_assert("BEQ2 err, PC != 0", c->PC == 0);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #21
0
static char * BCS1() {
    CPU *c = getCPU();
    uint16_t address = 0x8FFE;
    OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
    setFlag(c,C,1);
    bcs(c,o);
    mu_assert("BCS1 err, PC != 0x8FFE", c->PC == 0x8FFE);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #22
0
static char * BPL2() {
    CPU *c = getCPU();
    uint16_t address = 0xFFFF;
    OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
    setFlag(c,S,1);
    bpl(c,o);
    mu_assert("BPL2 err, PC != 0", c->PC == 0);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #23
0
static char * SBC2() {
    //pos ACUM, neg operand, no overflow, yes carry
    CPU *c = getCPU();
    setFlag(c,C,1);
    int8_t accumVal = testSBCHelper(c,-39,-92);
    mu_assert("SBC2 err, ACCUM reg != 53", accumVal == 53);
    mu_run_test_with_args(testRegStatus,c,"00100001",
            "          NVUBDIZC    NVUBDIZC\nSBC2 err, %s != %s");
    free(c);
    return 0;
}
Example #24
0
static char * ADC5() {
    //adding with carry flag, no overflow, no carry
    CPU *c = getCPU();
    setFlag(c,C,1);
    int8_t accumVal = testADCHelper(c,30,12);
    mu_assert("ADC5 err, ACCUM reg != 43", accumVal == 43);
    mu_run_test_with_args(testRegStatus,c,"00100000",
            "          NVUBDIZC    NVUBDIZC\nADC5 err, %s != %s");
    free(c);
    return 0;
}
Example #25
0
static char * BIT1() {
    CPU *c = getCPU();
    int8_t operand = 0xC0;
    OP_CODE_INFO *o = getOP_CODE_INFO(operand,0,modeImmediate);
    setRegByte(c,ACCUM,0);
    bit(c,o);
    mu_run_test_with_args(testRegStatus,c,"11100010",
            "          NVUBDIZC    NVUBDIZC\nBIT1 err, %s != %s");
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #26
0
static char * CPX2() {
    CPU *c = getCPU();
    int8_t operand = 75;
    OP_CODE_INFO *o = getOP_CODE_INFO(operand,0,modeImmediate);
    setRegByte(c,IND_X,59);
    cpx(c,o);
    mu_run_test_with_args(testRegStatus,c,"10100000",
            "          NVUBDIZC    NVUBDIZC\nCPX2 err, %s != %s");
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #27
0
static char * CMP2() {
    CPU *c = getCPU();
    int8_t operand = 50;
    OP_CODE_INFO *o = getOP_CODE_INFO(operand,0,modeImmediate);
    setRegByte(c,ACCUM,1);
    cmp(c,o);
    mu_run_test_with_args(testRegStatus,c,"10100000",
            "          NVUBDIZC    NVUBDIZC\nCMP2 err, %s != %s");
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #28
0
static char * STX1() {
    CPU *c = getCPU();
    uint16_t address = 0xFFEE;
    OP_CODE_INFO *o = getOP_CODE_INFO(0,address,modeImmediate);
    setRegByte(c,IND_X,-39);
    stx(c,o);
    int8_t addrVal = read(c,address);
    mu_assert("STX1 err, address at 0xFFEE != -39", addrVal == -39);
    freeOP_CODE_INFO(o);
    free(c);
    return 0;
}
Example #29
0
//Adds a new instruction to the log
void UpdateLog()
{
    CPU* cpu = (CPU*)getCPU();

    //sprintf(LogBuf,
    //    "PC:%.4X Opcode:%.2X\tA:%.2X X:%.2X Y:%.2X\tS:%.2X P:%.2X\n", 
    //    cpu->PC, RAM[cpu->PC], cpu->A, cpu->X, cpu->Y, cpu->S, cpu->P);
    int len = strlen(LogBuf);
    unsigned long d = 0;

    WriteFile(LogFile, LogBuf, len, &d, NULL);
}
Example #30
0
void LTEmolecule(Molecule *molecule)
{
    /* --- Calculate partition functions for each molecular vibrational
           state v of the molecule. LTE populations are then given by:

           nv^*[k] = molecule->n * pfv[v][k] / pf[k].

     Note: The actual LTE populations are calculated (in initSolution)
           only after chemical equilibrium has been established.
           --                                            -------------- */

    register int k, v, J, kr;

    char    labelStr[MAX_LINE_SIZE];
    double  kT, gJ, **E;
    MolecularLine *mrt;

    if (!molecule->active) {
        sprintf(messageStr, "Molecule must be active: %s\n", molecule->ID);
        Error(ERROR_LEVEL_2, "LTEmolecule", messageStr);
    }
    /* --- Fill energy matrix --                         -------------- */

    E = matrix_double(molecule->Nv, molecule->NJ);
    for (kr = 0;  kr < molecule->Nrt;  kr++) {
        mrt = molecule->mrt + kr;

        E[mrt->vi][(int) (mrt->gi - 1)/2] = mrt->Ei;
        E[mrt->vj][(int) (mrt->gj - 1)/2] = mrt->Ej;
    }

    for (k = 0;  k < atmos.Nspace;  k++)
        molecule->pf[k] = 0.0;

    for (v = 0;  v < molecule->Nv;  v++) {
        for (J = 0;  J < molecule->NJ;  J++) {
            gJ = 2*J + 1;
            for (k = 0;  k < atmos.Nspace;  k++)
                molecule->pfv[v][k] +=
                    gJ * exp(-E[v][J] / (KBOLTZMANN * atmos.T[k]));
        }
        /*  --- Also store the total partition function here -- --------- */

        for (k = 0;  k < atmos.Nspace;  k++)
            molecule->pf[k] += molecule->pfv[v][k];
    }

    freeMatrix((void **) E);

    sprintf(labelStr, "LTEpops %3s", molecule->ID);
    getCPU(4, TIME_POLL, labelStr);
}