static void translateBlock(std::deque<llvm::MCInst>& block) {
typedef std::map<std::string, LLVMValueRef>::const_iterator ValRef;
std::map<std::string, LLVMValueRef> locals;
std::map<std::string, LLVMValueRef> regs;
for (InstIter it = block.begin(); it != block.end(); ++it) {
llvm::MCInst& inst = *it;
const llvm::MCInstrDesc& id = MII->get(inst.getOpcode());
llvm::StringRef iname = MII->getName(inst.getOpcode());
if (iname.startswith("MOV")) {
LLVMValueRef lhs;
unsigned iop = 0;
if (id.OpInfo[0].OperandType == llvm::MCOI::OPERAND_MEMORY) {
std::string localName = getLocalName(inst, 0);
ValRef pval = locals.find(localName);
if (pval == locals.end()) {
lhs = LLVMBuildAlloca(llvmBuilder, LLVMInt32Type(), localName.c_str());
locals[localName] = lhs;
} else {
lhs = pval->second;
}
if (id.OpInfo[5].OperandType == llvm::MCOI::OPERAND_IMMEDIATE) {
const llvm::MCOperand& op = inst.getOperand(5);
LLVMBuildStore(llvmBuilder, lhs, LLVMConstInt(LLVMInt32Type(), op.getImm(), 0));
}
if (id.OpInfo[5].OperandType == llvm::MCOI::OPERAND_REGISTER) {
LLVMBuildStore(llvmBuilder, lhs, regs[getRegName(inst, 5)]);
}
} else if (id.OpInfo[0].OperandType == llvm::MCOI::OPERAND_REGISTER) {
LLVMValueRef rhs;
printInst(inst);
if (id.OpInfo[1].OperandType == llvm::MCOI::OPERAND_IMMEDIATE) {
rhs = LLVMConstInt(LLVMInt32Type(), inst.getOperand(1).getImm(), 0);
} else if (id.OpInfo[1].OperandType == llvm::MCOI::OPERAND_MEMORY) {
ValRef pval = locals.find(getLocalName(inst, 1));
if (pval == locals.end()) {
llvm::outs() << "No such local " << getLocalName(inst, 1) << "\n";
break;
}
rhs = LLVMBuildLoad(llvmBuilder, pval->second, getRegName(inst, 0));
} else {
continue;
}
regs[getRegName(inst, 0)] = rhs;
}
}
}
}
void EArm::wregs()
{
DEBUG_OUT<<"PC="<<pc<<"\n";
DEBUG_OUT<<"CPSR="<<cpsr<<"\n";
for(unsigned int i=0;i<8;i++) {
DEBUG_OUT<<getRegName(i)<<"="<<(ULONG)readReg(i)<<" ";
DEBUG_OUT<<getRegName(i+8)<<"="<<(ULONG)readReg(i+8)<<"\n";
}
}
void EArm::disOperand(ULONG loc,ECPUOperand *op)
{
EMapSymbol *e=NULL;
unsigned int t;
bool first=true;
switch(op->mode) {
case EARM_NONE:
break;
case EARM_REG:
DEBUG_OUT<<getRegName(op->reg);
break;
case EARM_INDREG:
DEBUG_OUT<<"("<<getRegName(op->reg);
DEBUG_OUT<<",#"<<(USHORT)op->val;
DEBUG_OUT<<")";
break;
case EARM_MULTREG:
DEBUG_OUT<<"{";
for(t=0;t<16;t++) {
val=power2(t);
if(val&op->val) {
if(!first) DEBUG_OUT<<",";
DEBUG_OUT<<getRegName(t);
first=false;
}
}
DEBUG_OUT<<"}";
break;
case EARM_IMM:
DEBUG_OUT<<"#"<<op->val;
break;
case EARM_DISP:
ea=loc+op->val+8;
DEBUG_OUT<<"$"<<ea;
e=map->findAnyNearestPrevSymbol(ea);
if(e) {
DEBUG_OUT<<" ("<<e->getName();
if(e->addr!=ea) {
DEBUG_OUT<<"+0x"<<(ea-(e->addr));
}
DEBUG_OUT<<")";
}
break;
default:
DEBUG_OUT<<"Mode was "<<op->mode<<"\n";
debugger("Bad mode in disOperand");
break;
}
}
void EMips::dishelper(const char *oname)
{
//unsigned int dig=w->getHexDigits();
//w->setHexDigits(1);
switch(opFormat) {
case EMIPS_FORMAT_NONE:
DEBUG_OUT<<oname;
break;
case EMIPS_FORMAT_CONST:
DEBUG_OUT<<oname<<" 0x"<<ea;
break;
case EMIPS_FORMAT_REG_REG_CONST:
switch(opSubFormat) {
case EMIPS_SUBFORMAT_NONE:
DEBUG_OUT<<oname<<" "<<getRegName(rt)<<","<<getRegName(rs)<<",0x"<<imm;
break;
case EMIPS_SUBFORMAT_BASED:
DEBUG_OUT<<oname<<" "<<getRegName(rt)<<",0x"<<imm<<"("<<getRegName(rs)<<")";
break;
default:
debugger("dishelper: bad subformat for REG_REG_CONST!");
break;
}
break;
case EMIPS_FORMAT_REG_REG_REG:
DEBUG_OUT<<oname<<" "<<getRegName(rd)<<","<<getRegName(rs)<<","<<getRegName(rt);
break;
default:
debugger("dishelper: bad opFormat!");
break;
}
if(opFlags==EMIPS_BRANCH) DEBUG_OUT<<" ; ???";
//w->setHexDigits(dig);
}
void EMips::writeReg(unsigned int n, ULONG val)
{
unsigned int rn=n&0x1f;
if(n) G[rn]=val;
#ifdef DEBUG_EXEC
if(n) DEBUG_OUT<<"\tWrite "<<val<<" to reg "<<getRegName(rn)<<"\n";
else DEBUG_OUT<<"Not writing to reg 0\n";
#endif
}
ULONG EMips::readReg(unsigned int n)
{
unsigned int rn=n&0x1f;
#ifdef DEBUG_EXEC
DEBUG_OUT<<"\tRead "<<G[rn]<<" from reg "<<getRegName(rn)<<"\n";
#endif
if(rn) return G[rn];
else return 0;
}
void CMCP23017::dumpReg(const uint8_t nRegAddr)
{
uint8_t nRegVal = readReg(nRegAddr);
Serial.print("********** ");
Serial.print(getRegName(nRegAddr));
Serial.print(" = ");
Serial.print(nRegVal, BIN);
Serial.println(" **********");
}
void EMips::wregs()
{
DEBUG_OUT<<"PC="<<pc<<" nPC="<<npc<<" ";
if(lsb) DEBUG_OUT<<"(Little)"; else DEBUG_OUT<<"(Big)";
DEBUG_OUT<<"\n";
for(unsigned int r=0;r<8;r++) {
DEBUG_OUT<<getRegName(r*4)<<"=";
for(unsigned int c=0;c<4;c++) DEBUG_OUT<<G[r*4+c]<<" ";
DEBUG_OUT<<"\n";
}
}
Opnd* OpndUtils::convertToXmmReg64(Opnd* xmmReg)
{
assert(isXmmReg(xmmReg));
RegName regName = xmmReg->getRegName();
OpndSize size = getRegSize(regName);
if (size == OpndSize_64) {
return xmmReg;
}
TypeManager& typeMan = m_irManager->getTypeManager();
Type* doubleType = typeMan.getDoubleType();
unsigned regIndex = getRegIndex(regName);
RegName regName64 = getRegName(OpndKind_XMMReg, OpndSize_64, regIndex);
Opnd* xmm64 = m_irManager->newRegOpnd(doubleType, regName64);
return xmm64;
}
//------------------------------------------------------------------------
// DumpUnwindInfo: Dump the unwind data.
//
// Arguments:
// isHotCode - true if this unwind data is for the hot section, false otherwise.
// startOffset - byte offset of the code start that this unwind data represents.
// endOffset - byte offset of the code end that this unwind data represents.
// pHeader - pointer to the unwind data blob.
//
void DumpUnwindInfo(bool isHotCode, UNATIVE_OFFSET startOffset, UNATIVE_OFFSET endOffset, const UNWIND_INFO * const pHeader)
{
printf("Unwind Info%s:\n", isHotCode ? "" : " COLD");
printf(" >> Start offset : 0x%06x (not in unwind data)\n", dspOffset(startOffset));
printf(" >> End offset : 0x%06x (not in unwind data)\n", dspOffset(endOffset));
if (pHeader == nullptr)
{
// Cold AMD64 code doesn't have unwind info; the VM creates chained unwind info.
assert(!isHotCode);
return;
}
printf(" Version : %u\n", pHeader->Version);
printf(" Flags : 0x%02x", pHeader->Flags);
if (pHeader->Flags)
{
const UCHAR flags = pHeader->Flags;
printf(" (");
if (flags & UNW_FLAG_EHANDLER)
printf(" UNW_FLAG_EHANDLER");
if (flags & UNW_FLAG_UHANDLER)
printf(" UNW_FLAG_UHANDLER");
if (flags & UNW_FLAG_CHAININFO)
printf(" UNW_FLAG_CHAININFO");
printf(")");
}
printf("\n");
printf(" SizeOfProlog : 0x%02X\n", pHeader->SizeOfProlog);
printf(" CountOfUnwindCodes: %u\n", pHeader->CountOfUnwindCodes);
printf(" FrameRegister : %s (%u)\n", (pHeader->FrameRegister == 0) ? "none" : getRegName(pHeader->FrameRegister), pHeader->FrameRegister); // RAX (0) is not allowed as a frame register
if (pHeader->FrameRegister == 0)
{
printf(" FrameOffset : N/A (no FrameRegister) (Value=%u)\n", pHeader->FrameOffset);
}
else
{
printf(" FrameOffset : %u * 16 = 0x%02X\n", pHeader->FrameOffset, pHeader->FrameOffset * 16);
}
printf(" UnwindCodes :\n");
for (unsigned i = 0; i < pHeader->CountOfUnwindCodes; i++)
{
const UNWIND_CODE * const pCode = &(pHeader->UnwindCode[i]);
switch (pCode->UnwindOp)
{
case UWOP_PUSH_NONVOL:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_PUSH_NONVOL (%u) OpInfo: %s (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, getRegName(pCode->OpInfo), pCode->OpInfo);
break;
case UWOP_ALLOC_LARGE:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_ALLOC_LARGE (%u) OpInfo: %u - ",
pCode->CodeOffset, pCode->UnwindOp, pCode->OpInfo);
if (pCode->OpInfo == 0)
{
i++;
printf("Scaled small \n Size: %u * 8 = %u = 0x%05X\n",
pHeader->UnwindCode[i].FrameOffset,
pHeader->UnwindCode[i].FrameOffset * 8,
pHeader->UnwindCode[i].FrameOffset * 8);
}
else if (pCode->OpInfo == 1)
{
i++;
printf("Unscaled large\n Size: %u = 0x%08X\n\n",
*(ULONG*)&(pHeader->UnwindCode[i]),
*(ULONG*)&(pHeader->UnwindCode[i]));
i++;
}
else
{
printf("Unknown\n");
}
break;
case UWOP_ALLOC_SMALL:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_ALLOC_SMALL (%u) OpInfo: %u * 8 + 8 = %u = 0x%02X\n",
pCode->CodeOffset, pCode->UnwindOp, pCode->OpInfo, pCode->OpInfo * 8 + 8, pCode->OpInfo * 8 + 8);
break;
case UWOP_SET_FPREG:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_SET_FPREG (%u) OpInfo: Unused (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, pCode->OpInfo); // This should be zero
break;
case UWOP_SAVE_NONVOL:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_SAVE_NONVOL (%u) OpInfo: %s (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, getRegName(pCode->OpInfo), pCode->OpInfo);
i++;
printf(" Scaled Small Offset: %u * 8 = %u = 0x%05X\n",
pHeader->UnwindCode[i].FrameOffset,
pHeader->UnwindCode[i].FrameOffset * 8,
pHeader->UnwindCode[i].FrameOffset * 8);
break;
case UWOP_SAVE_NONVOL_FAR:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_SAVE_NONVOL_FAR (%u) OpInfo: %s (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, getRegName(pCode->OpInfo), pCode->OpInfo);
i++;
printf(" Unscaled Large Offset: 0x%08X\n\n", *(ULONG*)&(pHeader->UnwindCode[i]));
i++;
break;
case UWOP_SAVE_XMM128:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_SAVE_XMM128 (%u) OpInfo: XMM%u (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, pCode->OpInfo, pCode->OpInfo);
i++;
printf(" Scaled Small Offset: %u * 16 = %u = 0x%05X\n",
pHeader->UnwindCode[i].FrameOffset,
pHeader->UnwindCode[i].FrameOffset * 16,
pHeader->UnwindCode[i].FrameOffset * 16);
break;
case UWOP_SAVE_XMM128_FAR:
printf(" CodeOffset: 0x%02X UnwindOp: UWOP_SAVE_XMM128_FAR (%u) OpInfo: XMM%u (%u)\n",
pCode->CodeOffset, pCode->UnwindOp, pCode->OpInfo, pCode->OpInfo);
i++;
printf(" Unscaled Large Offset: 0x%08X\n\n", *(ULONG*)&(pHeader->UnwindCode[i]));
i++;
break;
case UWOP_EPILOG:
case UWOP_SPARE_CODE:
case UWOP_PUSH_MACHFRAME:
default:
printf(" Unrecognized UNWIND_CODE: 0x%04X\n", *(USHORT*)pCode);
break;
}
}
}
void dspRegMask(regMaskTP regMask, size_t minSiz)
{
const char* sep = "";
printf("[");
bool inRegRange = false;
regNumber regPrev = REG_NA;
regNumber regHead = REG_NA; // When we start a range, remember the first register of the range, so we don't use range notation if the range contains just a single register.
for (regNumber regNum = REG_INT_FIRST; regNum <= REG_INT_LAST; regNum = REG_NEXT(regNum))
{
regMaskTP regBit = genRegMask(regNum);
if ((regMask & regBit) != 0)
{
// We have a register to display. It gets displayed now if:
// 1. This is the first register to display of a new range of registers (possibly because
// no register has ever been displayed).
// 2. This is the last register of an acceptable range (either the last integer register,
// or the last of a range that is displayed with range notation).
if (!inRegRange)
{
// It's the first register of a potential range.
const char* nam = getRegName(regNum);
printf("%s%s", sep, nam);
minSiz -= strlen(sep) + strlen(nam);
// By default, we're not starting a potential register range.
sep = " ";
// What kind of separator should we use for this range (if it is indeed going to be a range)?
#if defined(_TARGET_AMD64_)
// For AMD64, create ranges for int registers R8 through R15, but not the "old" registers.
if (regNum >= REG_R8)
{
regHead = regNum;
inRegRange = true;
sep = "-";
}
#elif defined(_TARGET_ARM64_)
// R17 and R28 can't be the start of a range, since the range would include TEB or FP
if ((regNum < REG_R17) ||
((REG_R19 <= regNum) && (regNum < REG_R28)))
{
regHead = regNum;
inRegRange = true;
sep = "-";
}
#elif defined(_TARGET_ARM_)
if (regNum < REG_R12)
{
regHead = regNum;
inRegRange = true;
sep = "-";
}
#elif defined(_TARGET_X86_)
// No register ranges
#else // _TARGET_*
#error Unsupported or unset target architecture
#endif // _TARGET_*
}
// We've already printed a register. Is this the end of a range?
#if defined(_TARGET_ARM64_)
else if ((regNum == REG_INT_LAST)
|| (regNum == REG_R17) // last register before TEB
|| (regNum == REG_R28)) // last register before FP
#else // _TARGET_ARM64_
else if (regNum == REG_INT_LAST)
#endif // _TARGET_ARM64_
{
const char* nam = getRegName(regNum);
printf("%s%s", sep, nam);
minSiz -= strlen(sep) + strlen(nam);
inRegRange = false; // No longer in the middle of a register range
regHead = REG_NA;
sep = " ";
}
}
else // ((regMask & regBit) == 0)
{
if (inRegRange)
{
assert(regHead != REG_NA);
if (regPrev != regHead)
{
// Close out the previous range, if it included more than one register.
const char* nam = getRegName(regPrev);
printf("%s%s", sep, nam);
minSiz -= strlen(sep) + strlen(nam);
}
sep = " ";
inRegRange = false;
regHead = REG_NA;
}
}
if (regBit > regMask)
break;
regPrev = regNum;
}
const char* getRegNameFloat(regNumber reg, var_types type)
{
#ifdef _TARGET_ARM_
assert(genIsValidFloatReg(reg));
if (type == TYP_FLOAT)
return getRegName(reg);
else
{
const char* regName;
switch (reg) {
default:
assert(!"Bad double register");
regName="d??";
break;
case REG_F0:
regName = "d0"; break;
case REG_F2:
regName = "d2"; break;
case REG_F4:
regName = "d4"; break;
case REG_F6:
regName = "d6"; break;
case REG_F8:
regName = "d8"; break;
case REG_F10:
regName = "d10"; break;
case REG_F12:
regName = "d12"; break;
case REG_F14:
regName = "d14"; break;
case REG_F16:
regName = "d16"; break;
case REG_F18:
regName = "d18"; break;
case REG_F20:
regName = "d20"; break;
case REG_F22:
regName = "d22"; break;
case REG_F24:
regName = "d24"; break;
case REG_F26:
regName = "d26"; break;
case REG_F28:
regName = "d28"; break;
case REG_F30:
regName = "d30"; break;
}
return regName;
}
#elif defined(_TARGET_X86_) && defined(LEGACY_BACKEND)
static const char* regNamesFloat[] =
{
#define REGDEF(name, rnum, mask, sname) sname,
#include "registerxmm.h"
};
assert((unsigned)reg < ArrLen(regNamesFloat));
return regNamesFloat[reg];
#elif defined(_TARGET_ARM64_)
static const char* regNamesFloat[] =
{
#define REGDEF(name, rnum, mask, xname, wname) xname,
#include "register.h"
};
assert((unsigned)reg < ArrLen(regNamesFloat));
return regNamesFloat[reg];
#else
static const char* regNamesFloat[] =
{
#define REGDEF(name, rnum, mask, sname) "x" sname,
#include "register.h"
};
#ifdef FEATURE_AVX_SUPPORT
static const char* regNamesYMM[] =
{
#define REGDEF(name, rnum, mask, sname) "y" sname,
#include "register.h"
};
#endif // FEATURE_AVX_SUPPORT
assert((unsigned)reg < ArrLen(regNamesFloat));
#ifdef FEATURE_AVX_SUPPORT
if (type == TYP_SIMD32)
{
return regNamesYMM[reg];
}
#endif // FEATURE_AVX_SUPPORT
return regNamesFloat[reg];
#endif
}
const char * getRegName(unsigned reg, bool isFloat) // this is for gcencode.cpp and disasm.cpp that dont use the regNumber type
{
return getRegName((regNumber)reg, isFloat);
}
void main()
{
char szName[80];
unsigned char szHolder[500], nSpaceCount = 0, nHighestVal = 0, nTot = 0;
long lPos = 0, lToSkip;
randomize();
printf("Enter Sysop name >");
gets(szName);
if ( strlen(szName) < 3 )
exit(0);
for ( short n = 0; n < strlen(szName); n++ )
{
if ( szName[n] == ' ' )
nSpaceCount++;
if ( szName[n] > nHighestVal )
nHighestVal = szName[n];
nTot += szName[n]/2;
}
szHolder[lPos++] = encode(strlen(szName), 0);
szHolder[lPos++] = encode(nSpaceCount, 1);
szHolder[lPos++] = encode(szName[2], 2);
szHolder[lPos++] = encode(szName[strlen(szName)-1], 3);
szHolder[lPos++] = encode(nHighestVal, 4);
szHolder[lPos++] = encode(strlen(szName), 5);
szHolder[lPos++] = encode(nTot, 6);
strrev(szName);
for ( short n = 0; n < strlen(szName); n++ )
{
szHolder[lPos] = encode(szName[n], lPos);
lPos++;
szHolder[lPos] = random(204) + 50;
lToSkip = szHolder[lPos] / 50;
szHolder[lPos] = ~szHolder[lPos];
lPos++;
unsigned char nSum = 7;
for ( short k = 0; k < lToSkip; k++ )
{
szHolder[lPos] = random(250);
nSum += szHolder[lPos]/6;
lPos++;
}
szHolder[lPos++] = nSum;
}
fstream myFile;
myFile.open("e:\\ttreg.dat", ios::binary | ios::out | ios::trunc );
myFile.write(szHolder, lPos);
myFile.close();
myFile.open("e:\\doors\\trivia\\regs.log", ios::out | ios::app);
myFile.write(strrev(szName), strlen(szName));
char szText[120], szFullDate[12];
_strdate(szFullDate);
sprintf(szText, "\n Registered on %s\n", szFullDate);
myFile.write(szText, strlen(szText));
sprintf(szText, " File size: %ld\n First ten bytes: ", lPos);
for ( short n = 0; n < 10; n++ )
{
sprintf(szFullDate, "%u ", szHolder[n]);
strcat(szText, szFullDate);
}
strcat(szText, "\n\n");
myFile.write(szText, strlen(szText));
printf("\nFile created and logged.\n");
char szCheckName[80];
short nStatus = getRegName(szCheckName, szHolder, lPos);
printf(" -> Reg status: %d; %s.\n\n", nStatus, szCheckName);
}
// I wrote this portion of the code myself.
char * processRFormat (char string[])
// Returns the assembly language string associated with the 32 byte command.
{
static char returnString[BUFSIZ];
char * destReg = getRegName(binToDec(string, 6, 10));
char * srcReg1 = getRegName(binToDec(string, 11, 15));
char * srcReg2 = getRegName(binToDec(string, 16, 20));
int shftAmnt = binToDec(string, 21, 25);
int functCode = binToDec(string, 26, 31);
if ( functCode == 0 )
{
sprintf(returnString, "sll %s, %s, %d \n", srcReg1, srcReg2, shftAmnt);
}
else if ( functCode == 2 )
{
sprintf(returnString, "sll %s, %s, %d \n", srcReg1, srcReg2, shftAmnt);
}
else if ( functCode == 8 )
{
sprintf(returnString, "jr %s \n", srcReg1);
}
else if ( functCode == 32 )
{
sprintf(returnString, "add %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 33 )
{
sprintf(returnString, "addu %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 34 )
{
sprintf(returnString, "sub %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 35 )
{
sprintf(returnString, "subu %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 36 )
{
sprintf(returnString, "and %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 37 )
{
sprintf(returnString, "or %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 39 )
{
sprintf(returnString, "nor %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 42 )
{
sprintf(returnString, "slt %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else if ( functCode == 43 )
{
sprintf(returnString, "sltu %s, %s, %s \n", destReg, srcReg1, srcReg2);
}
else
{
sprintf(returnString, "Unrecognizable functcode.\n");
}
return returnString;
}