static int build_opp_table(struct device *dev, const struct cvb_table *table, int speedo_value, unsigned long max_freq) { const struct rail_alignment *align = &table->alignment; int i, ret, dfll_mv, min_mv, max_mv; min_mv = round_voltage(table->min_millivolts, align, UP); max_mv = round_voltage(table->max_millivolts, align, DOWN); for (i = 0; i < MAX_DVFS_FREQS; i++) { const struct cvb_table_freq_entry *entry = &table->entries[i]; if (!entry->freq || (entry->freq > max_freq)) break; dfll_mv = get_cvb_voltage(speedo_value, table->speedo_scale, &entry->coefficients); dfll_mv = round_cvb_voltage(dfll_mv, table->voltage_scale, align); dfll_mv = clamp(dfll_mv, min_mv, max_mv); ret = dev_pm_opp_add(dev, entry->freq, dfll_mv * 1000); if (ret) return ret; } return 0; }
static int build_opp_table(const struct cvb_table *d, int speedo_value, unsigned long max_freq, struct device *opp_dev) { int i, ret, dfll_mv, min_mv, max_mv; const struct cvb_table_freq_entry *table = NULL; const struct rail_alignment *align = &d->alignment; min_mv = round_voltage(d->min_millivolts, align, UP); max_mv = round_voltage(d->max_millivolts, align, DOWN); for (i = 0; i < MAX_DVFS_FREQS; i++) { table = &d->cvb_table[i]; if (!table->freq || (table->freq > max_freq)) break; /* * FIXME after clk_round_rate/clk_determine_rate prototypes * have been updated */ if (table->freq & (1<<31)) continue; dfll_mv = get_cvb_voltage( speedo_value, d->speedo_scale, &table->coefficients); dfll_mv = round_cvb_voltage(dfll_mv, d->voltage_scale, align); dfll_mv = clamp(dfll_mv, min_mv, max_mv); ret = dev_pm_opp_add(opp_dev, table->freq, dfll_mv * 1000); if (ret) return ret; } return 0; }