/**
* Dumper interface for dumping sparc nodes in vcg.
* @param F the output file
* @param n the node to dump
* @param reason indicates which kind of information should be dumped
*/
static void sparc_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
switch (reason) {
case dump_node_opcode_txt:
fprintf(F, "%s", get_irn_opname(n));
break;
case dump_node_mode_txt:
break;
case dump_node_info_txt:
arch_dump_reqs_and_registers(F, n);
const sparc_attr_t *sparc_attr = get_sparc_attr_const(n);
if (sparc_attr->immediate_value_entity) {
ir_fprintf(F, "entity: %+F (offset %d)\n",
sparc_attr->immediate_value_entity,
sparc_attr->immediate_value);
} else {
ir_fprintf(F, "immediate value: %d\n", sparc_attr->immediate_value);
}
if (sparc_has_load_store_attr(n)) {
const sparc_load_store_attr_t *attr = get_sparc_load_store_attr_const(n);
ir_fprintf(F, "load store mode: %+F\n", attr->load_store_mode);
fprintf(F, "is frame entity: %s\n",
attr->is_frame_entity ? "true" : "false");
}
if (has_jmp_cond_attr(n)) {
const sparc_jmp_cond_attr_t *attr
= get_sparc_jmp_cond_attr_const(n);
fprintf(F, "relation: %d (%s)\n", (int)attr->relation,
get_relation_string(attr->relation));
fprintf(F, "unsigned: %s\n", attr->is_unsigned ? "true" : "false");
}
if (has_fp_attr(n)) {
const sparc_fp_attr_t *attr = get_sparc_fp_attr_const(n);
ir_fprintf(F, "fp_mode: %+F\n", attr->fp_mode);
}
if (has_fp_conv_attr(n)) {
const sparc_fp_conv_attr_t *attr = get_sparc_fp_conv_attr_const(n);
ir_fprintf(F, "conv from: %+F\n", attr->src_mode);
ir_fprintf(F, "conv to: %+F\n", attr->dest_mode);
}
break;
case dump_node_nodeattr_txt:
break;
}
}
/**
* Dumper interface for dumping arm nodes in vcg.
* @param F the output file
* @param n the node to dump
* @param reason indicates which kind of information should be dumped
*/
static void arm_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
switch (reason) {
case dump_node_opcode_txt:
fprintf(F, "%s", get_irn_opname(n));
if (arm_has_address_attr(n)) {
const arm_Address_attr_t *attr = get_arm_Address_attr_const(n);
if (attr->entity != NULL) {
fputc(' ', F);
fputs(get_entity_name(attr->entity), F);
}
}
break;
case dump_node_mode_txt:
/* mode isn't relevant in the backend */
break;
case dump_node_nodeattr_txt:
/* TODO: dump shift modifiers */
break;
case dump_node_info_txt:
be_dump_reqs_and_registers(F, n);
if (has_load_store_attr(n)) {
const arm_load_store_attr_t *attr
= get_arm_load_store_attr_const(n);
ir_fprintf(F, "load_store_mode = %+F\n", attr->load_store_mode);
ir_fprintf(F, "entity = %+F\n", attr->entity);
fprintf(F, "offset = %ld\n", attr->offset);
fprintf(F, "is_frame_entity = %s\n", be_dump_yesno(attr->is_frame_entity));
fprintf(F, "entity_sign = %s\n", be_dump_yesno(attr->entity_sign));
}
if (has_shifter_operand(n)) {
const arm_shifter_operand_t *attr
= get_arm_shifter_operand_attr_const(n);
switch (attr->shift_modifier) {
case ARM_SHF_REG:
break;
case ARM_SHF_IMM:
fprintf(F, "modifier = imm %d ror %d\n",
attr->immediate_value, attr->shift_immediate);
break;
case ARM_SHF_ASR_IMM:
fprintf(F, "modifier = V >>s %d\n", attr->shift_immediate);
break;
case ARM_SHF_ASR_REG:
fprintf(F, "modifier = V >>s R\n");
break;
case ARM_SHF_LSL_IMM:
fprintf(F, "modifier = V << %d\n", attr->shift_immediate);
break;
case ARM_SHF_LSL_REG:
fprintf(F, "modifier = V << R\n");
break;
case ARM_SHF_LSR_IMM:
fprintf(F, "modifier = V >> %d\n", attr->shift_immediate);
break;
case ARM_SHF_LSR_REG:
fprintf(F, "modifier = V >> R\n");
break;
case ARM_SHF_ROR_IMM:
fprintf(F, "modifier = V ROR %d\n", attr->shift_immediate);
break;
case ARM_SHF_ROR_REG:
fprintf(F, "modifier = V ROR R\n");
break;
case ARM_SHF_RRX:
fprintf(F, "modifier = RRX\n");
break;
default:
case ARM_SHF_INVALID:
fprintf(F, "modifier = INVALID SHIFT MODIFIER\n");
break;
}
}
if (has_cmp_attr(n)) {
const arm_cmp_attr_t *attr = get_arm_cmp_attr_const(n);
fprintf(F, "cmp_attr =");
if (attr->is_unsigned) {
fprintf(F, " unsigned");
}
if (attr->ins_permuted) {
fprintf(F, " inputs swapped");
}
fputc('\n', F);
}
if (arm_has_address_attr(n)) {
const arm_Address_attr_t *attr = get_arm_Address_attr_const(n);
fprintf(F, "entity = ");
if (attr->entity != NULL) {
fprintf(F, "'%s'", get_entity_name(attr->entity));
} else {
fputs("NULL", F);
}
fputc('\n', F);
fprintf(F, "frame offset = %d\n", attr->fp_offset);
}
if (has_farith_attr(n)) {
const arm_farith_attr_t *attr = get_arm_farith_attr_const(n);
ir_fprintf(F, "arithmetic mode = %+F\n", attr->mode);
}
break;
}
}
void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
switch (reason) {
case dump_node_opcode_txt:
fprintf(F, "%s", get_irn_opname(n));
if (is_ia32_Immediate(n) || is_ia32_Const(n)) {
ia32_immediate_attr_t const *const attr
= get_ia32_immediate_attr_const(n);
fputc(' ', F);
ia32_dump_immediate(F, attr->imm.entity, attr->imm.offset);
} else {
ia32_attr_t const *const attr = get_ia32_attr_const(n);
int32_t const offset = attr->addr.immediate.offset;
ir_entity *const entity = attr->addr.immediate.entity;
if (entity || offset != 0) {
fputs(" [", F);
ia32_dump_immediate(F, entity, offset);
fputc(']', F);
}
}
break;
case dump_node_mode_txt:
break;
case dump_node_nodeattr_txt:
if (! is_ia32_Lea(n)) {
switch (get_ia32_op_type(n)) {
case ia32_Normal: break;
case ia32_AddrModeS: fprintf(F, "[AM S] "); break;
case ia32_AddrModeD: fprintf(F, "[AM D] "); break;
}
}
break;
case dump_node_info_txt:
/* dump op type */
fprintf(F, "op = ");
switch (get_ia32_op_type(n)) {
case ia32_Normal:
fprintf(F, "Normal");
break;
case ia32_AddrModeD:
fprintf(F, "AM Dest (Load+Store)");
break;
case ia32_AddrModeS:
fprintf(F, "AM Source (Load)");
break;
default:
fprintf(F, "unknown (%d)", (int)get_ia32_op_type(n));
break;
}
fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
switch (get_ia32_am_support(n)) {
case ia32_am_none: fputs("none\n", F); break;
case ia32_am_unary: fputs("source (unary)\n", F); break;
case ia32_am_binary: fputs("source (binary)\n", F); break;
default:
fprintf(F, "unknown (%d)\n", (int)get_ia32_am_support(n));
break;
}
const ia32_attr_t *attr = get_ia32_attr_const(n);
fputs("AM immediate = ", F);
x86_dump_imm32(&attr->addr.immediate, F);
fputc('\n', F);
/* dump AM scale */
fprintf(F, "AM log_scale = %u\n", attr->addr.log_scale);
/* dump pn code */
if (has_ia32_condcode_attr(n)) {
const char *cc_name = condition_code_name(get_ia32_condcode(n));
if (cc_name) {
fprintf(F, "condition_code = %s\n", cc_name);
} else {
fprintf(F, "condition_code = <invalid (0x%X)>\n",
(unsigned)get_ia32_condcode(n));
}
fprintf(F, "ins_permuted = %s\n",
be_dump_yesno(attr->ins_permuted));
} else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
} else if (has_ia32_x87_attr(n)) {
ia32_x87_attr_t const *const attr = get_ia32_x87_attr_const(n);
fprintf(F, "explicit operand = %s\n",
be_dump_reg_name(attr->x87.reg));
fprintf(F, "result to explicit operand = %s\n",
be_dump_yesno(attr->x87.res_in_reg));
fprintf(F, "pop = %s\n", be_dump_yesno(attr->x87.pop));
}
fprintf(F, "commutative = %s\n",
be_dump_yesno(is_ia32_commutative(n)));
fprintf(F, "sign_extend = %s\n", be_dump_yesno(attr->sign_extend));
fprintf(F, "use_8bit_high = %s\n",
be_dump_yesno(attr->use_8bit_high));
fprintf(F, "is reload = %s\n", be_dump_yesno(is_ia32_is_reload(n)));
fprintf(F, "latency = %u\n", get_ia32_latency(n));
/* dump modes */
fprintf(F, "size = %u\n", x86_bytes_from_size(attr->size) * 8);
#ifndef NDEBUG
/* dump frame entity */
fprintf(F, "frame use = %s\n", get_frame_use_str(n));
if (attr->old_frame_ent != NULL) {
fprintf(F, "frame entity = ");
ir_entity *entity = attr->addr.immediate.entity;
if (entity != NULL) {
ir_fprintf(F, "%+F", entity);
} else {
fprintf(F, "n/a");
}
fprintf(F, "\n");
}
#endif
break;
}
}
/**
* Dumper interface for dumping ia32 nodes in vcg.
* @param n the node to dump
* @param F the output file
* @param reason indicates which kind of information should be dumped
* @return 0 on success or != 0 on failure
*/
static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
ir_mode *mode = NULL;
switch (reason) {
case dump_node_opcode_txt:
fprintf(F, "%s", get_irn_opname(n));
if (is_ia32_Immediate(n) || is_ia32_Const(n)) {
const ia32_immediate_attr_t *attr
= get_ia32_immediate_attr_const(n);
fputc(' ', F);
ir_entity *entity = attr->imm.entity;
if (entity)
fputs(get_entity_name(entity), F);
int32_t offset = attr->imm.offset;
if (offset != 0 || entity == NULL) {
if (offset > 0 && entity != NULL) {
fputc('+', F);
}
fprintf(F, "%"PRId32, offset);
}
} else {
const ia32_attr_t *attr = get_ia32_attr_const(n);
int32_t offset = attr->am_imm.offset;
ir_entity *entity = attr->am_imm.entity;
if (entity != NULL || offset != 0) {
fputs(" [", F);
if (entity != NULL)
fputs(get_entity_name(entity), F);
if (offset != 0) {
if (offset > 0 && entity != NULL) {
fputc('+', F);
}
fprintf(F, "%d", offset);
}
fputc(']', F);
}
}
break;
case dump_node_mode_txt:
mode = get_ia32_ls_mode(n);
if (mode != NULL)
fprintf(F, "[%s]", get_mode_name(mode));
break;
case dump_node_nodeattr_txt:
if (! is_ia32_Lea(n)) {
switch (get_ia32_op_type(n)) {
case ia32_Normal: break;
case ia32_AddrModeS: fprintf(F, "[AM S] "); break;
case ia32_AddrModeD: fprintf(F, "[AM D] "); break;
}
}
break;
case dump_node_info_txt:
be_dump_reqs_and_registers(F, n);
/* dump op type */
fprintf(F, "op = ");
switch (get_ia32_op_type(n)) {
case ia32_Normal:
fprintf(F, "Normal");
break;
case ia32_AddrModeD:
fprintf(F, "AM Dest (Load+Store)");
break;
case ia32_AddrModeS:
fprintf(F, "AM Source (Load)");
break;
default:
fprintf(F, "unknown (%d)", (int)get_ia32_op_type(n));
break;
}
fprintf(F, "\n");
/* dump supported am */
fprintf(F, "AM support = ");
switch (get_ia32_am_support(n)) {
case ia32_am_none: fputs("none\n", F); break;
case ia32_am_unary: fputs("source (unary)\n", F); break;
case ia32_am_binary: fputs("source (binary)\n", F); break;
default:
fprintf(F, "unknown (%d)\n", (int)get_ia32_am_support(n));
break;
}
const ia32_attr_t *attr = get_ia32_attr_const(n);
fputs("AM immediate = ", F);
x86_dump_imm32(&attr->am_imm, F);
fputc('\n', F);
/* dump AM scale */
fprintf(F, "AM scale = %u\n", get_ia32_am_scale(n));
/* dump pn code */
if (has_ia32_condcode_attr(n)) {
const char *cc_name = condition_code_name(get_ia32_condcode(n));
if (cc_name) {
fprintf(F, "condition_code = %s\n", cc_name);
} else {
fprintf(F, "condition_code = <invalid (0x%X)>\n",
(unsigned)get_ia32_condcode(n));
}
fprintf(F, "ins_permuted = %s\n", be_dump_yesno(attr->ins_permuted));
} else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
} else if (has_ia32_x87_attr(n)) {
ia32_x87_attr_t const *const attr = get_ia32_x87_attr_const(n);
fprintf(F, "explicit operand = %s\n", be_dump_reg_name(attr->reg));
fprintf(F, "result to explicit operand = %s\n", be_dump_yesno(attr->res_in_reg));
fprintf(F, "pop = %s\n", be_dump_yesno(attr->pop));
}
fprintf(F, "commutative = %s\n", be_dump_yesno(is_ia32_commutative(n)));
fprintf(F, "is reload = %s\n", be_dump_yesno(is_ia32_is_reload(n)));
fprintf(F, "latency = %u\n", get_ia32_latency(n));
/* dump modes */
fprintf(F, "ls_mode = ");
if (get_ia32_ls_mode(n)) {
ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
} else {
fprintf(F, "n/a");
}
fprintf(F, "\n");
#ifndef NDEBUG
/* dump frame entity */
fprintf(F, "frame use = %s\n", get_frame_use_str(n));
if (attr->old_frame_ent != NULL) {
fprintf(F, "frame entity = ");
ir_entity *entity = attr->am_imm.entity;
if (entity != NULL) {
ir_fprintf(F, "%+F", entity);
} else {
fprintf(F, "n/a");
}
}
/* dump original ir node name */
char const *orig = get_ia32_attr_const(n)->orig_node;
fprintf(F, "orig node = %s\n", orig ? orig : "n/a");
#endif /* NDEBUG */
break;
}
}
