int config_L2(int size)
{
int i;
struct cpumask mask;
int cur_size = get_l2c_size();
if (size != SZ_256K && size != SZ_512K) {
printk("inlvalid input size %x\n", size);
return -1;
}
if (in_interrupt()) {
printk(KERN_ERR "Cannot use %s in interrupt/softirq context\n",
__func__);
return -1;
}
if (size == cur_size) {
printk("Config L2 size %x is equal to current L2 size %x\n",
size, cur_size);
return 0;
}
cpumask_clear(&mask);
for(i = 0; i < get_cluster_core_count(); i++)
cpumask_set_cpu(i, &mask);
atomic_set(&L1_flush_done, 0);
get_online_cpus();
//printk("[Config L2] Config L2 start, on line cpu = %d\n",num_online_cpus());
/* disable cache and flush L1 on Cluster0*/
on_each_cpu_mask(&mask, (smp_call_func_t)atomic_flush, NULL, true);
//while(atomic_read(&L1_flush_done) != num_online_cpus());
//printk("[Config L2] L1 flush done\n");
/* Only need to flush Cluster0's L2 */
smp_call_function_any(&mask, (smp_call_func_t)inner_dcache_flush_L2, NULL, true);
//printk("[Config L2] L2 flush done\n");
/* change L2 size */
config_L2_size(size);
//printk("[Config L2] Change L2 flush size done(size = %d)\n",size);
/* enable Cluster0's cache */
atomic_set(&L1_flush_done, 0);
on_each_cpu_mask(&mask, (smp_call_func_t)__enable_cache, NULL, true);
//update cr_alignment for other kernel function usage
cr_alignment = cr_alignment | (0x4); //C1_CBIT
put_online_cpus();
printk("Config L2 size %x done\n", size);
return 0;
}
int config_L2(int size)
{
int cur_size = get_l2c_size();
if (size != SZ_256K && size != SZ_512K) {
printk("inlvalid input size %x\n", size);
return -1;
}
if (in_interrupt()) {
printk(KERN_ERR "Cannot use %s in interrupt/softirq context\n",
__func__);
return -1;
}
if (size == cur_size) {
printk("Config L2 size %x is equal to current L2 size %x\n",
size, cur_size);
return 0;
}
atomic_set(&L1_flush_done, 0);
get_online_cpus();
//printk("[Config L2] Config L2 start, on line cpu = %d\n",num_online_cpus());
/* disable cache and flush L1 */
on_each_cpu((smp_call_func_t)atomic_flush, NULL, true);
//while(atomic_read(&L1_flush_done) != num_online_cpus());
//printk("[Config L2] L1 flush done\n");
/* flush L2 */
inner_dcache_flush_L2();
//printk("[Config L2] L2 flush done\n");
/* change L2 size */
config_L2_size(size);
//printk("[Config L2] Change L2 flush size done(size = %d)\n",size);
/* enable cache */
atomic_set(&L1_flush_done, 0);
on_each_cpu((smp_call_func_t)__enable_cache, NULL, true);
//update cr_alignment for other kernel function usage
cr_alignment = cr_alignment | (0x4); //C1_CBIT
put_online_cpus();
printk("Config L2 size %x done\n", size);
return 0;
}