Example #1
0
void
nv20_emit_tex_obj(GLcontext *ctx, int emit)
{
	const int i = emit - NOUVEAU_STATE_TEX_OBJ0;
	struct nouveau_channel *chan = context_chan(ctx);
	struct nouveau_grobj *kelvin = context_eng3d(ctx);
	struct nouveau_bo_context *bctx = context_bctx_i(ctx, TEXTURE, i);
	const int bo_flags = NOUVEAU_BO_RD | NOUVEAU_BO_GART | NOUVEAU_BO_VRAM;
	struct gl_texture_object *t;
	struct nouveau_surface *s;
	struct gl_texture_image *ti;
	uint32_t tx_format, tx_filter, tx_wrap, tx_enable;

	if (!ctx->Texture.Unit[i]._ReallyEnabled) {
		BEGIN_RING(chan, kelvin, NV20TCL_TX_ENABLE(i), 1);
		OUT_RING(chan, 0);

		context_dirty(ctx, TEX_SHADER);
		return;
	}

	t = ctx->Texture.Unit[i]._Current;
	s = &to_nouveau_texture(t)->surfaces[t->BaseLevel];
	ti = t->Image[0][t->BaseLevel];

	if (!nouveau_texture_validate(ctx, t))
		return;

	/* Recompute the texturing registers. */
	tx_format = ti->DepthLog2 << 28
		| ti->HeightLog2 << 24
		| ti->WidthLog2 << 20
		| NV20TCL_TX_FORMAT_DIMS_2D
		| NV20TCL_TX_FORMAT_NO_BORDER
		| 1 << 16;

	tx_wrap = nvgl_wrap_mode(t->WrapR) << 16
		| nvgl_wrap_mode(t->WrapT) << 8
		| nvgl_wrap_mode(t->WrapS) << 0;

	tx_filter = nvgl_filter_mode(t->MagFilter) << 24
		| nvgl_filter_mode(t->MinFilter) << 16
		| 2 << 12;

	tx_enable = NV20TCL_TX_ENABLE_ENABLE
		| log2i(t->MaxAnisotropy) << 4;

	if (t->Target == GL_TEXTURE_RECTANGLE) {
		BEGIN_RING(chan, kelvin, NV20TCL_TX_NPOT_PITCH(i), 1);
		OUT_RING(chan, s->pitch << 16);
		BEGIN_RING(chan, kelvin, NV20TCL_TX_NPOT_SIZE(i), 1);
		OUT_RING(chan, s->width << 16 | s->height);

		tx_format |= get_tex_format_rect(ti);
	} else {
		tx_format |= get_tex_format_pot(ti);
	}

	if (t->MinFilter != GL_NEAREST &&
	    t->MinFilter != GL_LINEAR) {
		int lod_min = t->MinLod;
		int lod_max = MIN2(t->MaxLod, t->_MaxLambda);
		int lod_bias = t->LodBias
			+ ctx->Texture.Unit[i].LodBias;

		lod_max = CLAMP(lod_max, 0, 15);
		lod_min = CLAMP(lod_min, 0, 15);
		lod_bias = CLAMP(lod_bias, 0, 15);

		tx_format |= NV20TCL_TX_FORMAT_MIPMAP;
		tx_filter |= lod_bias << 8;
		tx_enable |= lod_min << 26
			| lod_max << 14;
	}

	/* Write it to the hardware. */
	nouveau_bo_mark(bctx, kelvin, NV20TCL_TX_FORMAT(i),
			s->bo, tx_format, 0,
			NV20TCL_TX_FORMAT_DMA0,
			NV20TCL_TX_FORMAT_DMA1,
			bo_flags | NOUVEAU_BO_OR);

	nouveau_bo_markl(bctx, kelvin, NV20TCL_TX_OFFSET(i),
			 s->bo, 0, bo_flags);

	BEGIN_RING(chan, kelvin, NV20TCL_TX_WRAP(i), 1);
	OUT_RING(chan, tx_wrap);

	BEGIN_RING(chan, kelvin, NV20TCL_TX_FILTER(i), 1);
	OUT_RING(chan, tx_filter);

	BEGIN_RING(chan, kelvin, NV20TCL_TX_ENABLE(i), 1);
	OUT_RING(chan, tx_enable);

	context_dirty(ctx, TEX_SHADER);
}
Example #2
0
void
nv20_emit_tex_obj(struct gl_context *ctx, int emit)
{
	const int i = emit - NOUVEAU_STATE_TEX_OBJ0;
	struct nouveau_pushbuf *push = context_push(ctx);
	const int bo_flags = NOUVEAU_BO_RD | NOUVEAU_BO_GART | NOUVEAU_BO_VRAM;
	struct gl_texture_object *t;
	struct nouveau_surface *s;
	struct gl_texture_image *ti;
	const struct gl_sampler_object *sa;
	uint32_t tx_format, tx_filter, tx_wrap, tx_enable;

	PUSH_RESET(push, BUFCTX_TEX(i));

	if (!ctx->Texture.Unit[i]._ReallyEnabled) {
		BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
		PUSH_DATA (push, 0);

		context_dirty(ctx, TEX_SHADER);
		return;
	}

	t = ctx->Texture.Unit[i]._Current;
	s = &to_nouveau_texture(t)->surfaces[t->BaseLevel];
	ti = t->Image[0][t->BaseLevel];
	sa = _mesa_get_samplerobj(ctx, i);

	if (!nouveau_texture_validate(ctx, t))
		return;

	/* Recompute the texturing registers. */
	tx_format = ti->DepthLog2 << 28
		| ti->HeightLog2 << 24
		| ti->WidthLog2 << 20
		| NV20_3D_TEX_FORMAT_DIMS_2D
		| NV20_3D_TEX_FORMAT_NO_BORDER
		| 1 << 16;

	tx_wrap = nvgl_wrap_mode(sa->WrapR) << 16
		| nvgl_wrap_mode(sa->WrapT) << 8
		| nvgl_wrap_mode(sa->WrapS) << 0;

	tx_filter = nvgl_filter_mode(sa->MagFilter) << 24
		| nvgl_filter_mode(sa->MinFilter) << 16
		| 2 << 12;

	tx_enable = NV20_3D_TEX_ENABLE_ENABLE
		| log2i(sa->MaxAnisotropy) << 4;

	if (t->Target == GL_TEXTURE_RECTANGLE) {
		BEGIN_NV04(push, NV20_3D(TEX_NPOT_PITCH(i)), 1);
		PUSH_DATA (push, s->pitch << 16);
		BEGIN_NV04(push, NV20_3D(TEX_NPOT_SIZE(i)), 1);
		PUSH_DATA (push, s->width << 16 | s->height);

		tx_format |= get_tex_format_rect(ti);
	} else {
		tx_format |= get_tex_format_pot(ti);
	}

	if (sa->MinFilter != GL_NEAREST &&
	    sa->MinFilter != GL_LINEAR) {
		int lod_min = sa->MinLod;
		int lod_max = MIN2(sa->MaxLod, t->_MaxLambda);
		int lod_bias = sa->LodBias
			+ ctx->Texture.Unit[i].LodBias;

		lod_max = CLAMP(lod_max, 0, 15);
		lod_min = CLAMP(lod_min, 0, 15);
		lod_bias = CLAMP(lod_bias, 0, 15);

		tx_format |= NV20_3D_TEX_FORMAT_MIPMAP;
		tx_filter |= lod_bias << 8;
		tx_enable |= lod_min << 26
			| lod_max << 14;
	}

	/* Write it to the hardware. */
	BEGIN_NV04(push, NV20_3D(TEX_FORMAT(i)), 1);
	PUSH_MTHD (push, NV20_3D(TEX_FORMAT(i)), BUFCTX_TEX(i),
			 s->bo, tx_format, bo_flags | NOUVEAU_BO_OR,
			 NV20_3D_TEX_FORMAT_DMA0,
			 NV20_3D_TEX_FORMAT_DMA1);

	BEGIN_NV04(push, NV20_3D(TEX_OFFSET(i)), 1);
	PUSH_MTHDl(push, NV20_3D(TEX_OFFSET(i)), BUFCTX_TEX(i),
			 s->bo, s->offset, bo_flags);

	BEGIN_NV04(push, NV20_3D(TEX_WRAP(i)), 1);
	PUSH_DATA (push, tx_wrap);

	BEGIN_NV04(push, NV20_3D(TEX_FILTER(i)), 1);
	PUSH_DATA (push, tx_filter);

	BEGIN_NV04(push, NV20_3D(TEX_ENABLE(i)), 1);
	PUSH_DATA (push, tx_enable);

	context_dirty(ctx, TEX_SHADER);
}