int getc(void) { unsigned char ch; uint64_t start; /* * For 100us we read the characters from the serial driver * into a kfifo. This helps us not to lose characters * in small hardware fifos. */ start = get_time_ns(); while (1) { if (tstc()) { kfifo_putc(console_input_buffer, getc_raw()); start = get_time_ns(); } if (is_timeout(start, 100 * USECOND) && kfifo_len(console_input_buffer)) break; } kfifo_getc(console_input_buffer, &ch); return ch; }
/* Reset the internal and external PHYs. */ static void gfar_init_phy(struct eth_device *dev) { struct gfar_private *priv = dev->priv; void __iomem *regs = priv->regs; uint64_t start; /* Assign a Physical address to the TBI */ out_be32(regs + GFAR_TBIPA_OFFSET, GFAR_TBIPA_VALUE); /* Reset MII (due to new addresses) */ out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET); out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { if (!(in_be32(priv->phyregs + GFAR_MIIMMIND_OFFSET) & GFAR_MIIMIND_BUSY)) break; } gfar_local_mdio_write(priv->phyregs, priv->phyaddr, GFAR_MIIM_CR, GFAR_MIIM_CR_RST); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { if (!(gfar_local_mdio_read(priv->phyregs, priv->phyaddr, GFAR_MIIM_CR) & GFAR_MIIM_CR_RST)) break; } if (in_be32(regs + GFAR_ECNTRL_OFFSET) & GFAR_ECNTRL_SGMII_MODE) gfar_configure_serdes(priv); }
static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) { uint32_t intr_status = 0; uint64_t start; if (!is_flash_bank_valid(denali->flash_bank)) { dev_dbg(denali->dev, "No valid chip selected (%d)\n", denali->flash_bank); return 0; } start = get_time_ns(); while (!is_timeout(start, 1000 * MSECOND)) { intr_status = read_interrupt_status(denali); if (intr_status != 0) clear_interrupt(denali, intr_status); if (intr_status & irq_mask) return intr_status; } /* timeout */ dev_dbg(denali->dev, "timeout occurred, status = 0x%x, mask = 0x%x\n", intr_status, irq_mask); return 0; }
/************************************************************************** RPC request dispatcher **************************************************************************/ static void nfs_send(void) { debug("%s\n", __func__); switch (nfs_state) { case STATE_PRCLOOKUP_PROG_MOUNT_REQ: rpc_lookup_req(PROG_MOUNT, 1); break; case STATE_PRCLOOKUP_PROG_NFS_REQ: rpc_lookup_req(PROG_NFS, 2); break; case STATE_MOUNT_REQ: nfs_mount_req(nfs_path); break; case STATE_UMOUNT_REQ: nfs_umountall_req(); break; case STATE_LOOKUP_REQ: nfs_lookup_req(nfs_filename); break; case STATE_READ_REQ: nfs_read_req(nfs_offset, NFS_READ_SIZE); break; case STATE_READLINK_REQ: nfs_readlink_req(); break; } nfs_timer_start = get_time_ns(); }
static int tftp_poll(struct file_priv *priv) { if (ctrlc()) { priv->state = STATE_DONE; priv->err = -EINTR; return -EINTR; } if (is_timeout(priv->resend_timeout, TFTP_RESEND_TIMEOUT)) { printf("T "); priv->resend_timeout = get_time_ns(); priv->block_requested = -1; return TFTP_ERR_RESEND; } if (is_timeout(priv->progress_timeout, TFTP_TIMEOUT)) { priv->state = STATE_DONE; priv->err = -ETIMEDOUT; return -ETIMEDOUT; } net_poll(); return 0; }
static int dwc_ether_mii_write(struct mii_bus *dev, int addr, int reg, u16 val) { struct dw_eth_dev *priv = dev->priv; struct eth_mac_regs *mac_p = priv->mac_regs_p; u64 start; u32 miiaddr; writel(val, &mac_p->miidata); miiaddr = ((addr << MIIADDRSHIFT) & MII_ADDRMSK) | \ ((reg << MIIREGSHIFT) & MII_REGMSK) | MII_WRITE; writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, &mac_p->miiaddr); start = get_time_ns(); while (readl(&mac_p->miiaddr) & MII_BUSY) { if (is_timeout(start, 10 * MSECOND)) { dev_err(&priv->netdev.dev, "MDIO timeout\n"); return -EIO; } } /* Needed as a fix for ST-Phy */ dwc_ether_mii_read(dev, addr, reg); return 0; }
int miiphy_wait_aneg(struct miiphy_device *mdev) { uint64_t start; uint16_t status; if (mdev->flags & MIIPHY_FORCE_LINK) return 0; /* * Wait for AN completion */ start = get_time_ns(); do { if (is_timeout(start, 5 * SECOND)) { printf("%s: Autonegotiation timeout\n", mdev->cdev.name); return -1; } if (mdev->read(mdev, mdev->address, MII_BMSR, &status)) { printf("%s: Autonegotiation failed. status: 0x%04x\n", mdev->cdev.name, status); return -1; } } while (!(status & BMSR_LSTATUS)); return 0; }
IPaddr_t resolv(char *host) { IPaddr_t ip; const char *ns; if (!string_to_ip(host, &ip)) return ip; dns_ip = 0; dns_state = STATE_INIT; ns = getenv("net.nameserver"); if (!ns || !*ns) { printk("%s: no nameserver specified in $net.nameserver\n", __func__); return 0; } if (string_to_ip(ns, &ip)) return 0; debug("resolving host %s via nameserver %s\n", host, ip_to_string(ip)); dns_con = net_udp_new(ip, DNS_PORT, dns_handler, NULL); if (IS_ERR(dns_con)) return PTR_ERR(dns_con); dns_timer_start = get_time_ns(); dns_send(host); while (dns_state != STATE_DONE) { if (ctrlc()) { break; } net_poll(); if (is_timeout(dns_timer_start, SECOND)) { dns_timer_start = get_time_ns(); printf("T "); dns_send(host); } } net_unregister(dns_con); return dns_ip; }
static int imx6_ocotp_wait_busy(struct ocotp_priv *priv, u32 flags) { uint64_t start = get_time_ns(); while (readl(priv->base + OCOTP_CTRL) & (OCOTP_CTRL_BUSY | flags)) if (is_timeout(start, MSECOND)) return -ETIMEDOUT; return 0; }
/* * Call a function asynchronously * * @pa the poller to be used * @delay The delay in nanoseconds * @fn The function to call * @ctx context pointer passed to the function * * This calls the passed function after a delay of delay_ns. Returns * a pointer which can be used as a cookie to cancel a scheduled call. */ int poller_call_async(struct poller_async *pa, uint64_t delay_ns, void (*fn)(void *), void *ctx) { pa->ctx = ctx; pa->end = get_time_ns() + delay_ns; pa->fn = fn; pa->active = 1; return 0; }
static int mxs_ocotp_wait_busy(struct ocotp_priv *priv) { uint64_t start = get_time_ns(); /* check both BUSY and ERROR cleared */ while (readl(priv->base + OCOTP_CTRL) & (OCOTP_CTRL_BUSY | OCOTP_CTRL_ERROR)) if (is_timeout(start, MSECOND)) return -ETIMEDOUT; return 0; }
/* * Handle DHCP received packets. */ static void dhcp_handler(void *ctx, char *packet, unsigned int len) { char *pkt = net_eth_to_udp_payload(packet); struct udphdr *udp = net_eth_to_udphdr(packet); struct bootp *bp = (struct bootp *)pkt; len = net_eth_to_udplen(packet); debug("DHCPHandler: got packet: (len=%d) state: %d\n", len, dhcp_state); if (bootp_check_packet(pkt, ntohs(udp->uh_sport), len)) /* Filter out pkts we don't want */ return; switch (dhcp_state) { case SELECTING: /* * Wait an appropriate time for any potential DHCPOFFER packets * to arrive. Then select one, and generate DHCPREQUEST response. * If filename is in format we recognize, assume it is a valid * OFFER from a server we want. */ debug ("%s: state SELECTING, bp_file: \"%s\"\n", __func__, bp->bp_file); dhcp_state = REQUESTING; if (net_read_uint32((uint32_t *)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC)) dhcp_options_process((u8 *)&bp->bp_vend[4], bp); bootp_copy_net_params(bp); /* Store net params from reply */ dhcp_start = get_time_ns(); dhcp_send_request_packet(bp); break; case REQUESTING: debug ("%s: State REQUESTING\n", __func__); if (dhcp_message_type((u8 *)bp->bp_vend) == DHCP_ACK ) { if (net_read_uint32((uint32_t *)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC)) dhcp_options_process((u8 *)&bp->bp_vend[4], bp); bootp_copy_net_params(bp); /* Store net params from reply */ dhcp_state = BOUND; puts ("DHCP client bound to address "); print_IPaddr(net_get_ip()); putchar('\n'); return; } break; default: debug("%s: INVALID STATE\n", __func__); break; } }
static int bootp_request(void) { struct bootp *bp; int ext_len; int ret; unsigned char *payload = net_udp_get_payload(dhcp_con); const char *bfile; dhcp_state = INIT; debug("BOOTP broadcast\n"); bp = (struct bootp *)payload; bp->bp_op = OP_BOOTREQUEST; bp->bp_htype = HWT_ETHER; bp->bp_hlen = HWL_ETHER; bp->bp_hops = 0; bp->bp_secs = htons(get_time_ns() >> 30); net_write_ip(&bp->bp_ciaddr, 0); net_write_ip(&bp->bp_yiaddr, 0); net_write_ip(&bp->bp_siaddr, 0); net_write_ip(&bp->bp_giaddr, 0); memcpy(bp->bp_chaddr, dhcp_con->et->et_src, 6); bfile = getenv("bootfile"); if (bfile) safe_strncpy (bp->bp_file, bfile, sizeof(bp->bp_file)); /* Request additional information from the BOOTP/DHCP server */ ext_len = dhcp_extended((u8 *)bp->bp_vend, DHCP_DISCOVER, 0, 0); Bootp_id = (uint32_t)get_time_ns(); net_copy_uint32(&bp->bp_id, &Bootp_id); dhcp_state = SELECTING; ret = net_udp_send(dhcp_con, sizeof(*bp) + ext_len); return ret; }
static void poller_async_callback(struct poller_struct *poller) { struct poller_async *pa = container_of(poller, struct poller_async, poller); if (!pa->active) return; if (get_time_ns() < pa->end) return; pa->active = 0; pa->fn(pa->ctx); }
static int do_time(int argc, char *argv[]) { int i; unsigned char *buf; u64 start, end, diff64; unsigned long diff; int len = 1; /* '\0' */ if (argc < 2) return COMMAND_ERROR_USAGE; for (i = 1; i < argc; i++) len += strlen(argv[i]) + 1; buf = xzalloc(len); for (i = 1; i < argc; i++) { strcat(buf, argv[i]); strcat(buf, " "); } start = get_time_ns(); run_command(buf); end = get_time_ns(); diff64 = end - start; do_div(diff64, 1000000); diff = diff64; printf("time: %lums\n", diff); free(buf); return 0; }
static int arc_mdio_complete_wait(struct arc_emac_priv *priv) { uint64_t start = get_time_ns(); while (!is_timeout(start, 1000 * MSECOND)) { if (arc_reg_get(priv, R_STATUS) & MDIO_MASK) { /* Reset "MDIO complete" flag */ arc_reg_set(priv, R_STATUS, MDIO_MASK); return 0; } } return -ETIMEDOUT; }
void sgx_hw_start(void) { hw_running_state++; if (hw_running_state == 1) { mutex_lock(&time_data_lock); hw_start_time = get_time_ns(); if (timer_running != true) { /* first time setting */ timer_running = true; period_start_time = hw_start_time; } mutex_unlock(&time_data_lock); } }
static int macb_phy_read(struct mii_device *mdev, int addr, int reg) { struct eth_device *edev = mdev->edev; struct macb_device *macb = edev->priv; unsigned long netctl; unsigned long netstat; unsigned long frame; int iflag; int value; uint64_t start; debug("%s\n", __func__); iflag = disable_interrupts(); netctl = readl(macb->regs + MACB_NCR); netctl |= MACB_BIT(MPE); writel(netctl, macb->regs + MACB_NCR); if (iflag) enable_interrupts(); frame = (MACB_BF(SOF, 1) | MACB_BF(RW, 2) | MACB_BF(PHYA, addr) | MACB_BF(REGA, reg) | MACB_BF(CODE, 2)); writel(frame, macb->regs + MACB_MAN); start = get_time_ns(); do { netstat = readl(macb->regs + MACB_NSR); if (is_timeout(start, SECOND)) { printf("phy read timed out\n"); return -1; } } while (!(netstat & MACB_BIT(IDLE))); frame = readl(macb->regs + MACB_MAN); value = MACB_BFEXT(DATA, frame); iflag = disable_interrupts(); netctl = readl(macb->regs + MACB_NCR); netctl &= ~MACB_BIT(MPE); writel(netctl, macb->regs + MACB_NCR); if (iflag) enable_interrupts(); return value; }
int e1000_poll_reg(struct e1000_hw *hw, uint32_t reg, uint32_t mask, uint32_t value, uint64_t timeout) { const uint64_t start = get_time_ns(); do { const uint32_t v = e1000_read_reg(hw, reg); if ((v & mask) == value) return 0; } while (!is_timeout(start, timeout)); return -ETIMEDOUT; }
/* * Wait until the PHY operation is complete. */ static inline int at91_phy_wait(void) { uint64_t start; start = get_time_ns(); do { if (is_timeout(start, 2 * MSECOND)) { puts("at91_ether: MIO timeout\n"); return -1; } } while (!(at91_emac_read(AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)); return 0; }
void sgx_hw_end(void) { if (hw_running_state > 0) { hw_running_state--; if (hw_running_state == 0) { u64 time_now = get_time_ns(); mutex_lock(&time_data_lock); total_work_time += (time_now - hw_start_time); hw_start_time = 0; mutex_unlock(&time_data_lock); } } }
/* Writes the given phy's reg with value, using the specified MDIO regs */ static int gfar_local_mdio_write(void __iomem *phyregs, uint addr, uint reg, uint value) { uint64_t start; out_be32(phyregs + GFAR_MIIMADD_OFFSET, (addr << 8) | (reg & 0x1f)); out_be32(phyregs + GFAR_MIIMCON_OFFSET, value); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { if (!(in_be32(phyregs + GFAR_MIIMMIND_OFFSET) & GFAR_MIIMIND_BUSY)) return 0; } return -EIO; }
static int dwmci_wait_reset(struct dwmci_host *host, uint32_t value) { uint64_t start; uint32_t ctrl; start = get_time_ns(); dwmci_writel(host, DWMCI_CTRL, value); while (!is_timeout(start, SECOND)) { ctrl = dwmci_readl(host, DWMCI_CTRL); if (!(ctrl & DWMCI_RESET_ALL)) return 0; } return -EIO; }
static int gfar_bus_reset(struct mii_bus *bus) { struct gfar_phy *phy = bus->priv; uint64_t start; /* Reset MII (due to new addresses) */ out_be32(phy->regs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET); out_be32(phy->regs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { if (!(in_be32(phy->regs + GFAR_MIIMMIND_OFFSET) & GFAR_MIIMIND_BUSY)) break; } return 0; }
/* * Service routine to read status register until ready, or timeout occurs. * Returns non-zero if error. */ static int wait_till_ready(struct m25p *flash) { int sr; uint64_t timer_start; timer_start = get_time_ns(); do { if ((sr = read_sr(flash)) < 0) break; else if (!(sr & SR_WIP)) return 0; } while (!(is_timeout(timer_start, MAX_READY_WAIT * SECOND))); return -ETIMEDOUT; }
static int do_sleep(int argc, char *argv[]) { uint64_t start; ulong delay; if (argc != 2) return COMMAND_ERROR_USAGE; delay = simple_strtoul(argv[1], NULL, 10); start = get_time_ns(); while (!is_timeout(start, delay * SECOND)) { if (ctrlc()) return 1; } return 0; }
/* * This function sends a single packet on the network * and returns 0 on successful transmit or negative for error */ static int davinci_emac_send(struct eth_device *edev, void *packet, int length) { struct davinci_emac_priv *priv = edev->priv; uint64_t start; int ret_status; dev_dbg(priv->dev, "+ emac_send (length %d)\n", length); /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { length = EMAC_MIN_ETHERNET_PKT_SIZE; } /* Populate the TX descriptor */ writel(0, priv->emac_tx_desc + EMAC_DESC_NEXT); writel((uint8_t *) packet, priv->emac_tx_desc + EMAC_DESC_BUFFER); writel((length & 0xffff), priv->emac_tx_desc + EMAC_DESC_BUFF_OFF_LEN); writel(((length & 0xffff) | EMAC_CPPI_SOP_BIT | EMAC_CPPI_OWNERSHIP_BIT | EMAC_CPPI_EOP_BIT), priv->emac_tx_desc + EMAC_DESC_PKT_FLAG_LEN); dma_sync_single_for_device((unsigned long)packet, length, DMA_TO_DEVICE); /* Send the packet */ writel(BD_TO_HW(priv->emac_tx_desc), priv->adap_emac + EMAC_TX0HDP); /* Wait for packet to complete or link down */ start = get_time_ns(); while (1) { if (readl(priv->adap_emac + EMAC_TXINTSTATRAW) & 0x01) { /* Acknowledge the TX descriptor */ writel(BD_TO_HW(priv->emac_tx_desc), priv->adap_emac + EMAC_TX0CP); ret_status = 0; break; } if (is_timeout(start, 100 * MSECOND)) { ret_status = -ETIMEDOUT; break; } } dma_sync_single_for_cpu((unsigned long)packet, length, DMA_TO_DEVICE); dev_dbg(priv->dev, "- emac_send (ret_status %i)\n", ret_status); return ret_status; }
static int i2c_imx_acked(struct i2c_adapter *adapter) { unsigned long base = adapter->dev->map_base; uint64_t start; start = get_time_ns(); while (1) { unsigned int reg = readb(base + IMX_I2C_I2SR); if (!(reg & I2SR_RXAK)) break; if (is_timeout(start, MSECOND)) { dev_err(adapter->dev, "<%s> No ACK\n", __func__); return -EIO; } } return 0; }
static int i2c_imx_wait_iif(struct i2c_adapter *adapter) { unsigned long base = adapter->dev->map_base; uint64_t start; start = get_time_ns(); while (1) { unsigned int reg = readb(base + IMX_I2C_I2SR); if (reg & I2SR_IIF) break; if (is_timeout(start, 100 * MSECOND)) { dev_err(adapter->dev, "<%s> IIF timeout\n", __func__); return -EIO; } } return 0; }
static int mac_reset(struct eth_device *dev) { struct dw_eth_dev *priv = dev->priv; struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; u64 start; writel(DMAMAC_SRST, &dma_p->busmode); writel(MII_PORTSELECT, &mac_p->conf); start = get_time_ns(); while (readl(&dma_p->busmode) & DMAMAC_SRST) { if (is_timeout(start, 10 * MSECOND)) { dev_err(&priv->netdev.dev, "MAC reset timeout\n"); return -EIO; } } return 0; }