/*******************************************************************************
* This function returns the type of the interrupt id depending upon the group
* this interrupt has been configured under by the interrupt controller i.e.
* group0 or group1.
******************************************************************************/
uint32_t plat_ic_get_interrupt_type(uint32_t id)
{
uint32_t group;
group = gicd_get_igroupr(GICD_BASE, id);
/* Assume that all secure interrupts are S-EL1 interrupts */
if (group == GRP0)
return INTR_TYPE_S_EL1;
else
return INTR_TYPE_NS;
}
/*
* Make sure that the interrupt's group is set before expecting
* this function to do its job correctly.
*/
void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri)
{
/*
* Enforce ARM recommendation to manage priority values such
* that group1 interrupts always have a lower priority than
* group0 interrupts.
* Note, lower numerical values are higher priorities so the comparison
* checks below are reversed from what might be expected.
*/
assert(gicd_get_igroupr(base, id) == GRP1 ?
pri >= GIC_HIGHEST_NS_PRIORITY &&
pri <= GIC_LOWEST_NS_PRIORITY :
pri >= GIC_HIGHEST_SEC_PRIORITY &&
pri <= GIC_LOWEST_SEC_PRIORITY);
mmio_write_8(base + GICD_IPRIORITYR + id, pri & GIC_PRI_MASK);
}
/*
* Make sure that the interrupt's group is set before expecting
* this function to do its job correctly.
*/
void gicd_set_ipriorityr(unsigned int base, unsigned int id, unsigned int pri)
{
unsigned int reg = base + GICD_IPRIORITYR + (id & ~3);
unsigned int shift = (id & 3) << 3;
unsigned int reg_val = mmio_read_32(reg);
/*
* Enforce ARM recommendation to manage priority values such
* that group1 interrupts always have a lower priority than
* group0 interrupts.
* Note, lower numerical values are higher priorities so the comparison
* checks below are reversed from what might be expected.
*/
assert(gicd_get_igroupr(base, id) == GRP1 ?
pri >= GIC_HIGHEST_NS_PRIORITY &&
pri <= GIC_LOWEST_NS_PRIORITY :
pri >= GIC_HIGHEST_SEC_PRIORITY &&
pri <= GIC_LOWEST_SEC_PRIORITY);
reg_val &= ~(GIC_PRI_MASK << shift);
reg_val |= (pri & GIC_PRI_MASK) << shift;
mmio_write_32(reg, reg_val);
}
