Example #1
0
void
gk104_grctx_generate_main(struct gf100_gr_priv *priv, struct gf100_grctx *info)
{
	struct gf100_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass;
	int i;

	nvkm_mc(priv)->unk260(nvkm_mc(priv), 0);

	gf100_gr_mmio(priv, oclass->hub);
	gf100_gr_mmio(priv, oclass->gpc);
	gf100_gr_mmio(priv, oclass->zcull);
	gf100_gr_mmio(priv, oclass->tpc);
	gf100_gr_mmio(priv, oclass->ppc);

	nv_wr32(priv, 0x404154, 0x00000000);

	oclass->bundle(info);
	oclass->pagepool(info);
	oclass->attrib(info);
	oclass->unkn(priv);

	gf100_grctx_generate_tpcid(priv);
	gf100_grctx_generate_r406028(priv);
	gk104_grctx_generate_r418bb8(priv);
	gf100_grctx_generate_r406800(priv);

	for (i = 0; i < 8; i++)
		nv_wr32(priv, 0x4064d0 + (i * 0x04), 0x00000000);

	nv_wr32(priv, 0x405b00, (priv->tpc_total << 8) | priv->gpc_nr);
	if (priv->gpc_nr == 1) {
		nv_mask(priv, 0x408850, 0x0000000f, priv->tpc_nr[0]);
		nv_mask(priv, 0x408958, 0x0000000f, priv->tpc_nr[0]);
	} else {
		nv_mask(priv, 0x408850, 0x0000000f, priv->gpc_nr);
		nv_mask(priv, 0x408958, 0x0000000f, priv->gpc_nr);
	}
	nv_mask(priv, 0x419f78, 0x00000001, 0x00000000);

	gf100_gr_icmd(priv, oclass->icmd);
	nv_wr32(priv, 0x404154, 0x00000400);
	gf100_gr_mthd(priv, oclass->mthd);
	nvkm_mc(priv)->unk260(nvkm_mc(priv), 1);

	nv_mask(priv, 0x418800, 0x00200000, 0x00200000);
	nv_mask(priv, 0x41be10, 0x00800000, 0x00800000);
}
Example #2
0
static void
gk20a_grctx_generate_main(struct gf100_gr_priv *priv, struct gf100_grctx *info)
{
	struct gf100_grctx_oclass *oclass = (void *)nv_engine(priv)->cclass;
	int idle_timeout_save;
	int i;

	gf100_gr_mmio(priv, priv->fuc_sw_ctx);

	gf100_gr_wait_idle(priv);

	idle_timeout_save = nv_rd32(priv, 0x404154);
	nv_wr32(priv, 0x404154, 0x00000000);

	oclass->attrib(info);

	oclass->unkn(priv);

	gf100_grctx_generate_tpcid(priv);
	gf100_grctx_generate_r406028(priv);
	gk104_grctx_generate_r418bb8(priv);
	gf100_grctx_generate_r406800(priv);

	for (i = 0; i < 8; i++)
		nv_wr32(priv, 0x4064d0 + (i * 0x04), 0x00000000);

	nv_wr32(priv, 0x405b00, (priv->tpc_total << 8) | priv->gpc_nr);

	gk104_grctx_generate_rop_active_fbps(priv);

	nv_mask(priv, 0x5044b0, 0x8000000, 0x8000000);

	gf100_gr_wait_idle(priv);

	nv_wr32(priv, 0x404154, idle_timeout_save);
	gf100_gr_wait_idle(priv);

	gf100_gr_mthd(priv, priv->fuc_method);
	gf100_gr_wait_idle(priv);

	gf100_gr_icmd(priv, priv->fuc_bundle);
	oclass->pagepool(info);
	oclass->bundle(info);
}
Example #3
0
static void
gm200_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
{
	struct nvkm_device *device = gr->base.engine.subdev.device;
	const struct gf100_grctx_func *grctx = gr->func->grctx;
	u32 idle_timeout, tmp;
	int i;

	gf100_gr_mmio(gr, gr->fuc_sw_ctx);

	idle_timeout = nvkm_mask(device, 0x404154, 0xffffffff, 0x00000000);

	grctx->bundle(info);
	grctx->pagepool(info);
	grctx->attrib(info);
	grctx->unkn(gr);

	gm200_grctx_generate_tpcid(gr);
	gf100_grctx_generate_r406028(gr);
	gk104_grctx_generate_r418bb8(gr);

	for (i = 0; i < 8; i++)
		nvkm_wr32(device, 0x4064d0 + (i * 0x04), 0x00000000);
	nvkm_wr32(device, 0x406500, 0x00000000);

	nvkm_wr32(device, 0x405b00, (gr->tpc_total << 8) | gr->gpc_nr);

	gm200_grctx_generate_rop_active_fbps(gr);

	for (tmp = 0, i = 0; i < gr->gpc_nr; i++)
		tmp |= ((1 << gr->tpc_nr[i]) - 1) << (i * 4);
	nvkm_wr32(device, 0x4041c4, tmp);

	gm200_grctx_generate_405b60(gr);

	gf100_gr_icmd(gr, gr->fuc_bundle);
	nvkm_wr32(device, 0x404154, idle_timeout);
	gf100_gr_mthd(gr, gr->fuc_method);

	nvkm_mask(device, 0x418e94, 0xffffffff, 0xc4230000);
	nvkm_mask(device, 0x418e4c, 0xffffffff, 0x70000000);
}