int
cs80status(void *v, int slave, int punit, struct cs80_stat *css)
{
struct cs80bus_softc *sc = v;
struct cs80_statuscmd rs;
u_int8_t stat;
rs.c_unit = CS80CMD_SUNIT(punit);
rs.c_sram = CS80CMD_SRAM;
rs.c_param = 0; /* single vector (i.e. sector number) */
rs.c_cmd = CS80CMD_STATUS;
memset((void *)css, 0, sizeof(*css));
(void) gpibsend(sc->sc_ic, slave, CS80CMD_SCMD, &rs, sizeof(rs));
(void) gpibrecv(sc->sc_ic, slave, CS80CMD_EXEC, css, sizeof(*css));
(void) gpibrecv(sc->sc_ic, slave, CS80CMD_QSTAT, &stat, 1);
if (stat != 0) {
DPRINTF(DBG_FAIL, ("cs80status: failed, stat=0x%x\n", stat));
return (1);
}
BE16TOH(css->c_ref);
BE16TOH(css->c_fef);
BE16TOH(css->c_aef);
BE16TOH(css->c_ief);
BE32TOH(css->c_blk);
return (0);
}
int
cs80send(void *v, int slave, int punit, int cmd, void *ptr, int cnt)
{
struct cs80bus_softc *sc = v;
u_int8_t *buf = ptr;
u_int8_t stat;
DPRINTF(DBG_FOLLOW,
("cs80send: sc=%p slave=%d punit=%d cmd=%d ptr=%p cnt=%d\n", sc,
slave, punit, cmd, buf, cnt));
if (gpibsend(sc->sc_ic, slave, cmd, buf, cnt) != cnt) {
DPRINTF(DBG_FAIL, ("cs80send: SCMD failed\n"));
return (1);
}
if (gpibswait(sc->sc_ic, slave)) {
DPRINTF(DBG_FAIL, ("cs80send: wait failed\n"));
return (1);
}
if (gpibrecv(sc->sc_ic, slave, CS80CMD_QSTAT, &stat, 1) != 1) {
DPRINTF(DBG_FAIL, ("cs80send: QSTAT failed\n"));
return (1);
}
if (stat != 0) {
DPRINTF(DBG_FAIL, ("cs80send: failed, stat=0x%x\n", stat));
return (1);
}
return (0);
}
int
cs80describe(void *v, int slave, int punit, struct cs80_description *csd)
{
struct cs80bus_softc *sc = v;
struct cs80_describecmd desc;
u_int8_t stat;
DPRINTF(DBG_FOLLOW, ("cs80describe: sc=%p slave=%d\n", sc, slave));
/*
* Note command is always issued to unit 0.
*/
desc.c_unit = CS80CMD_SUNIT(0);
desc.c_vol = CS80CMD_SVOL(0);
desc.c_cmd = CS80CMD_DESC;
(void) gpibsend(sc->sc_ic, slave, CS80CMD_SCMD, &desc, sizeof(desc));
(void) gpibrecv(sc->sc_ic, slave, CS80CMD_EXEC, csd, sizeof(*csd));
(void) gpibrecv(sc->sc_ic, slave, CS80CMD_QSTAT, &stat, 1);
if (stat != 0) {
DPRINTF(DBG_FAIL, ("cs80describe: failed, stat=0x%x\n", stat));
return (1);
}
BE16TOH(csd->d_iuw);
BE16TOH(csd->d_cmaxxfr);
BE16TOH(csd->d_sectsize);
BE16TOH(csd->d_blocktime);
BE16TOH(csd->d_uavexfr);
BE16TOH(csd->d_retry);
BE16TOH(csd->d_access);
BE32TOH(csd->d_maxcylhead);
BE16TOH(csd->d_maxsect);
BE16TOH(csd->d_maxvsecth);
BE32TOH(csd->d_maxvsectl);
return (0);
}
void
cs80busattach(device_t parent, device_t self, void *aux)
{
struct cs80bus_softc *sc = device_private(self);
struct gpib_attach_args *ga = aux;
struct cs80bus_attach_args ca;
int slave;
u_int16_t id;
printf("\n");
sc->sc_dev = self;
sc->sc_ic = ga->ga_ic;
for (slave = 0; slave < 8; slave++) {
if (gpib_isalloc(device_private(device_parent(sc->sc_dev)),
slave))
continue;
if (gpibrecv(sc->sc_ic, GPIB_BROADCAST_ADDR,
slave, &id, 2) != 2)
continue;
BE16TOH(id);
DPRINTF(DBG_STATUS, ("cs80busattach: found id 0x%x\n", id));
if ((id & 0x200) == 0)
continue;
ca.ca_ic = sc->sc_ic;
ca.ca_slave = slave;
ca.ca_id = id;
(void)config_search_ia(cs80bussearch, sc->sc_dev, "cs80bus",
&ca);
}
}
/*
* Perform a read of "Device Status Jump" register and update the
* status if necessary. If status is read, the given "ecmd" is also
* performed, unless "ecmd" is zero. Returns DSJ value, -1 on failure
* and -2 on "temporary" failure.
*/
int
mtreaddsj(struct mt_softc *sc, int ecmd)
{
int retval;
if (sc->sc_flags & MTF_STATTIMEO)
goto getstats;
retval = gpibrecv(sc->sc_ic,
(sc->sc_flags & MTF_DSJTIMEO) ? -1 : sc->sc_slave,
MTT_DSJ, &(sc->sc_lastdsj), 1);
sc->sc_flags &= ~MTF_DSJTIMEO;
if (retval != 1) {
DPRINTF(MDB_ANY, ("%s can't gpibrecv DSJ",
device_xname(sc->sc_dev)));
if (sc->sc_recvtimeo == 0)
sc->sc_recvtimeo = hz;
if (--sc->sc_recvtimeo == 0)
return (-1);
if (retval == 0)
sc->sc_flags |= MTF_DSJTIMEO;
return (-2);
}
sc->sc_recvtimeo = 0;
sc->sc_statindex = 0;
DPRINTF(MDB_ANY, ("%s readdsj: 0x%x", device_xname(sc->sc_dev),
sc->sc_lastdsj));
sc->sc_lastecmd = ecmd;
switch (sc->sc_lastdsj) {
case 0:
if (ecmd & MTE_DSJ_FORCE)
break;
return (0);
case 2:
sc->sc_lastecmd = MTE_COMPLETE;
case 1:
break;
default:
printf("%s readdsj: DSJ 0x%x\n", device_xname(sc->sc_dev),
sc->sc_lastdsj);
return (-1);
}
getstats:
retval = gpibrecv(sc->sc_ic,
(sc->sc_flags & MTF_STATCONT) ? -1 : sc->sc_slave, MTT_STAT,
((char *)&(sc->sc_stat)) + sc->sc_statindex,
sizeof(sc->sc_stat) - sc->sc_statindex);
sc->sc_flags &= ~(MTF_STATTIMEO | MTF_STATCONT);
if (retval != sizeof(sc->sc_stat) - sc->sc_statindex) {
if (sc->sc_recvtimeo == 0)
sc->sc_recvtimeo = hz;
if (--sc->sc_recvtimeo != 0) {
if (retval >= 0) {
sc->sc_statindex += retval;
sc->sc_flags |= MTF_STATCONT;
}
sc->sc_flags |= MTF_STATTIMEO;
return (-2);
}
printf("%s readdsj: can't read status", device_xname(sc->sc_dev));
return (-1);
}
sc->sc_recvtimeo = 0;
sc->sc_statindex = 0;
DPRINTF(MDB_ANY, ("%s readdsj: status is %x %x %x %x %x %x",
device_xname(sc->sc_dev),
sc->sc_stat1, sc->sc_stat2, sc->sc_stat3,
sc->sc_stat4, sc->sc_stat5, sc->sc_stat6));
if (sc->sc_lastecmd)
(void) gpibsend(sc->sc_ic, sc->sc_slave,
MTL_ECMD, &(sc->sc_lastecmd), 1);
return ((int) sc->sc_lastdsj);
}
void
cecxfer(void *v, int slave, int sec, void *buf, int count, int dir, int timo)
{
struct cec_softc *sc = v;
bus_space_tag_t iot = sc->sc_iot;
bus_space_handle_t ioh = sc->sc_ioh;
DPRINTF(DBG_FOLLOW,
("cecxfer: slave=%d sec=%d buf=%p count=%d dir=%x timo=%d\n",
slave, sec, buf, count, dir, timo));
sc->sc_flags |= CECF_IO;
if (dir == GPIB_READ)
sc->sc_flags |= CECF_READ;
if (timo) {
sc->sc_flags |= CECF_TIMO;
callout_reset(&sc->sc_timeout_ch, 5*hz, cectimeout, sc);
}
if (sc->sc_flags & CECF_READ) {
DPRINTF(DBG_FOLLOW, ("cecxfer: DMA read request\n"));
if ((sc->sc_flags & CECF_USEDMA) != 0) {
isa_dmastart(sc->sc_ic, sc->sc_drq, buf, count, NULL,
DMAMODE_READ | DMAMODE_DEMAND, BUS_DMA_NOWAIT);
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_DMAI);
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_END);
// XXX (void) cecrecv(sc, slave, sec, NULL, 0);
(void) gpibrecv(&cec_ic, slave, sec, NULL, 0);
} else {
/* XXX this doesn't work */
DPRINTF(DBG_FOLLOW, ("cecxfer: polling instead\n"));
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_END);
// XXX (void) cecrecv(sc, slave, sec, buf, count);
(void) gpibrecv(&cec_ic, slave, sec, buf, count);
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_CO);
}
} else {
DPRINTF(DBG_FOLLOW, ("cecxfer: DMA write request\n"));
bus_space_write_1(iot, ioh, NEC7210_IMR2, 0);
if (count < cecdmathresh ||
(sc->sc_flags & CECF_USEDMA) == 0) {
DPRINTF(DBG_FOLLOW, ("cecxfer: polling instead\n"));
// XXX (void) cecsend(sc, slave, sec, buf, count);
(void) gpibsend(&cec_ic, slave, sec, buf, count);
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_CO);
return;
}
/* we send the last byte with EOI set */
isa_dmastart(sc->sc_ic, sc->sc_drq, buf, count-1, NULL,
DMAMODE_WRITE | DMAMODE_DEMAND, BUS_DMA_NOWAIT);
bus_space_write_1(iot, ioh, NEC7210_IMR2, IMR2_DMAO);
// XXX (void) cecsend(sc, slave, sec, NULL, 0);
(void) gpibsend(&cec_ic, slave, sec, NULL, 0);
while (!isa_dmafinished(sc->sc_ic, sc->sc_drq))
DELAY(1);
(void) cecwait(sc, ISR1_DO, 0);
bus_space_write_1(iot, ioh, NEC7210_AUXMR, AUXCMD_SEOI);
bus_space_write_1(iot, ioh, NEC7210_CDOR, *(char *)buf+count);
/* generate interrupt */
bus_space_write_1(iot, ioh, NEC7210_IMR1, IMR1_DO);
}
}
