void fpga_spiinitgpio(uint32_t DSP_FPGA_CSGPIO)
{
gpioInit();
gpioSetDirection(DSP_FPGA_CSGPIO,GPIO_OUT);
gpioSetOutput(DSP_FPGA_CSGPIO);
}
float acquire_data()
{
//GPIO_3-CNVST, GPIO_13-CS
//Start the ADC communication
timer_flag=0;
//Timer_start(timer1);
platform_write("stated timer \n");
data_index=0;
int cnt=0;
long int tscl_val, tsch_val;
long int tscl_val1, tsch_val1;
float elapsed_time=0;
for(;;)
{
TSCL = 0;
TSCH = 0;
tscl_val = TSCL;
//tsch_val = TSCH;
/*if(timer_flag==1)
{
platform_write("processing sample %d \n",cnt);
timer_flag=0;
break;
}*/
//Pull CNVST low
//platform_write("eeee");
gpioClearOutput(GPIO_3);
//platform_write("BBBB");
//Wait for 50ns right now without any delay (10ns minimum)
//Set CNVST high again
gpioSetOutput(GPIO_3);
//platform_write("CCCCC");
platform_delaycycles(650); //Approximately 650 ns for 500 argument and 720ns for 600 argument
//Pull CS pin low
gpioClearOutput(GPIO_13);
//platform_write("DDDDD");
//gpioSetOutput(GPIO_7);
for(i=0; i<28; i++)
{
gpioClearOutput(GPIO_7);
if(i==0 || i==14)
{
if(i==0)
data_bufferA[data_index]=0;
else if(i==14)
data_bufferB[data_index]=0;
platform_delaycycles(100);
//platform_write("AAAA");
data_bit=gpioReadInput(GPIO_10);
//platform_write("FFFFF");
}
else
platform_delaycycles(60);
if(i<14)
data_bufferA[data_index]=(data_bufferA[data_index]<<1)+data_bit;
if(i<28 && i >=14)
data_bufferB[data_index]=(data_bufferB[data_index]<<1)+data_bit;
gpioSetOutput(GPIO_7);
interrupt_call_count=0;
if(i==27)
{
if(data_bufferB[data_index]>NEGATIVE_VALUE_MARGIN) //Means negative value
data_bufferB[data_index] = data_bufferB[data_index]-FULL_SCALE_VALUE; //Invert the value
}
if(i==13)
{
if(data_bufferA[data_index]>NEGATIVE_VALUE_MARGIN) //Means negative value
data_bufferA[data_index] = data_bufferB[data_index]-FULL_SCALE_VALUE; //Invert the value
}
}
//Release CS pin
gpioSetOutput(GPIO_13);
cnt++;
data_index=data_index+1;
data_index=data_index%PULSE_SAMPLE;
tscl_val1 = TSCL;
elapsed_time += ((float)(tscl_val1-tscl_val)/(float)DSP_clockcycles_persec);//_itoll(tsch_val, tscl_val);
if(elapsed_time >=2 )
break;
//platform_write("elapsed time for sample is %d ",elapsed_time);
// if(data_index==0)
// break;
}
platform_write("Total number of samples are %d,%f \n",cnt,elapsed_time);
return cnt;
}
int hpdspuaStart (void) {
uint32_t coreId;
QMSS_CFG_T qmss_cfg;
CPPI_CFG_T cppi_cfg;
/* determine the core number. */
coreId = CSL_chipReadReg (CSL_CHIP_DNUM);
led_no=coreId;
platform_write("num of cores %d starts twinkling its LED\n", number_of_cores);
platform_write("core = %d starts twinkling its LED\n", coreId);
//platform_uart_init();
//platform_uart_set_baudrate(115200);
// write_uart("AAAAAAAA");
gpioInit();
gpioSetDirection(GPIO_10 ,GPIO_IN); //DOUTA pin
gpioSetDirection(GPIO_3 ,GPIO_OUT); //CNVST pin
gpioSetDirection(GPIO_13 ,GPIO_OUT); //CS pin
gpioSetDirection(GPIO_7 ,GPIO_OUT); //SCLK
//ADDR = 0, VA1 and VB1 are sampled; ADDR =1, VA2 and VB2 are sampled
//Right now VA1 and VB1 are being sampled
gpioSetOutput(GPIO_7); //By default clock high
gpioSetOutput(GPIO_3); // by default conversion pin high
gpioSetOutput(GPIO_13); // BY Default CS pin high
gpioSetFallingEdgeInterrupt(GPIO_10);
gpioSetRisingEdgeInterrupt(GPIO_10);
gpioEnableGlobalInterrupt();
//Wait for 100us before starting first conversion
platform_delay(100);
int rc=0;
while(1) {
if(coreId==0)
{
if (platform_get_coreid() == 0)
{
qmss_cfg.master_core = 1;
}
else
{
qmss_cfg.master_core = 0;
}
qmss_cfg.max_num_desc = MAX_NUM_DESC;
qmss_cfg.desc_size = MAX_DESC_SIZE;
qmss_cfg.mem_region = Qmss_MemRegion_MEMORY_REGION0;
if (res_mgr_init_qmss (&qmss_cfg) != 0)
{
platform_write ("Failed to initialize the QMSS subsystem \n");
goto main_exit;
}
else
{
platform_write ("QMSS successfully initialized \n");
}
if (platform_get_coreid() == 0)
{
cppi_cfg.master_core = 1;
}
else
{
cppi_cfg.master_core = 0;
}
cppi_cfg.dma_num = Cppi_CpDma_PASS_CPDMA;
cppi_cfg.num_tx_queues = NUM_PA_TX_QUEUES;
cppi_cfg.num_rx_channels = NUM_PA_RX_CHANNELS;
if (res_mgr_init_cppi (&cppi_cfg) != 0)
{
platform_write ("Failed to initialize CPPI subsystem \n");
goto main_exit;
}
else
{
platform_write ("CPPI successfully initialized \n");
}
if (res_mgr_init_pass()!= 0) {
platform_write ("Failed to initialize the Packet Accelerator \n");
goto main_exit;
}
else
{
platform_write ("PA successfully initialized \n");
}
rc = NC_SystemOpen( NC_PRIORITY_HIGH, NC_OPMODE_INTERRUPT );
if( rc ) {
platform_write("NC_SystemOpen Failed (%d). Will die in an infinite loop so you need to reset...\n",rc);
for(;;);
}
platform_write("HUA version %s\n", BLM_VERSION);
hCfg = CfgNew();
if( !hCfg )
{
platform_write("Unable to create a configuration for the IP stack.\n");
goto main_exit;
}
strcpy (HostName, "tidemo-");
i = strlen(HostName);
j = strlen(gPlatformInfo.serial_nbr);
if (j > 0) {
if (j > 6) {
memcpy (&HostName[i], &gPlatformInfo.serial_nbr[j-6], 6);
HostName[i+7] = '\0';
}
else {
memcpy (&HostName[i], gPlatformInfo.serial_nbr, j);
HostName[i+j+1] = '\0';
}
}
if( strlen( DomainName ) >= CFG_DOMAIN_MAX ||
strlen( HostName ) >= CFG_HOSTNAME_MAX )
{
platform_write("Domain or Host Name too long\n");
goto main_exit;
}
platform_write("Setting hostname to %s \n", HostName);
platform_write("MAC Address: %02X-%02X-%02X-%02X-%02X-%02X \n",
gPlatformInfo.emac.efuse_mac_address[0], gPlatformInfo.emac.efuse_mac_address[1],
gPlatformInfo.emac.efuse_mac_address[2], gPlatformInfo.emac.efuse_mac_address[3],
gPlatformInfo.emac.efuse_mac_address[4], gPlatformInfo.emac.efuse_mac_address[5]);
CfgAddEntry( hCfg, CFGTAG_SYSINFO, CFGITEM_DHCP_HOSTNAME, 0,
strlen(HostName), (uint8_t *)HostName, 0 );
if (!platform_get_switch_state(1)) {
CI_IPNET NA;
CI_ROUTE RT;
IPN IPTmp;
bzero( &NA, sizeof(NA) );
NA.IPAddr = inet_addr(EVMStaticIP);
NA.IPMask = inet_addr(LocalIPMask);
strcpy( NA.Domain, DomainName );
CfgAddEntry( hCfg, CFGTAG_IPNET, 1, 1, sizeof(CI_IPNET), (uint8_t *)&NA, 0 );
bzero( &RT, sizeof(RT) );
RT.IPDestAddr = inet_addr(PCStaticIP);
RT.IPDestMask = inet_addr(LocalIPMask);
RT.IPGateAddr = inet_addr(GatewayIP);
CfgAddEntry( hCfg, CFGTAG_ROUTE, 0, 1, sizeof(CI_ROUTE), (uint8_t *)&RT, 0 );
platform_write("EVM in StaticIP mode at %s\n",EVMStaticIP);
platform_write("Set IP address of PC to %s\n", PCStaticIP);
}
rc = DBG_WARN;
CfgAddEntry( hCfg, CFGTAG_OS, CFGITEM_OS_DBGPRINTLEVEL,
CFG_ADDMODE_UNIQUE, sizeof(uint), (uint8_t *)&rc, 0 );
rc = 64000;
CfgAddEntry( hCfg, CFGTAG_IP, CFGITEM_IP_SOCKTCPTXBUF,
CFG_ADDMODE_UNIQUE, sizeof(uint), (uint8_t *)&rc, 0 );
rc = 64000;
CfgAddEntry( hCfg, CFGTAG_IP, CFGITEM_IP_SOCKTCPRXBUF,
CFG_ADDMODE_UNIQUE, sizeof(uint), (uint8_t *)&rc, 0 );
rc = 64000;
CfgAddEntry( hCfg, CFGTAG_IP, CFGITEM_IP_SOCKTCPRXLIMIT,
CFG_ADDMODE_UNIQUE, sizeof(uint), (uint8_t *)&rc, 0 );
rc = 8192;
CfgAddEntry( hCfg, CFGTAG_IP, CFGITEM_IP_SOCKUDPRXLIMIT,
CFG_ADDMODE_UNIQUE, sizeof(uint), (uint8_t *)&rc, 0 );
do
{
rc = NC_NetStart( hCfg, NetworkOpen, NetworkClose, NetworkIPAddr );
} while( rc > 0 );
platform_write("Done with this utility. Shutting things down\n");
CfgFree( hCfg );
main_exit:
platform_write("Exiting the system\n");
//NC_SystemClose();
TaskExit();
return(0);
}
else
{
while(1)
{
platform_write("done processing .exiting core %d \n", coreId);
platform_delay(300000);
break;
}
platform_delay(300000);
break;
}
}
platform_write("done processing .exiting core %d", coreId);
platform_delay(3000000);
return 0;
}
