void __init wx5800_pci_hw_init(void)
{
/* Disable PCI clock */
*IXP425_GPIO_GPCLKR &= ~IXP425_PCI_CLK_ENABLE;
/* configure PCI-related GPIO */
gpio_line_config(IXP425_PCI_CLK_PIN, IXP425_GPIO_OUT);
gpio_line_config(IXP425_PCI_RESET_GPIO, IXP425_GPIO_OUT);
gpio_line_config(IXP425_PCI_INTA_GPIO,
IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(IXP425_PCI_INTB_GPIO,
IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(IXP425_PCI_INTA_GPIO);
gpio_line_isr_clear(IXP425_PCI_INTB_GPIO);
/* Assert reset for PCI controller */
gpio_line_set(IXP425_PCI_RESET_GPIO, IXP425_GPIO_LOW);
/* wait 1ms to satisfy "minimum reset assertion time" of the PCI spec. */
udelay(1000);
/* Config PCI clock */
*IXP425_GPIO_GPCLKR |= (0xf << IXP425_PCI_CLK_TC_LSH) |
(0xf << IXP425_PCI_CLK_DC_LSH);
/* Enable PCI clock */
*IXP425_GPIO_GPCLKR |= IXP425_PCI_CLK_ENABLE;
/* wait 100us to satisfy "minimum reset assertion time from clock stable"
* requirement of the PCI spec. */
udelay(100);
/* Deassert reset for PCI controller */
gpio_line_set(IXP425_PCI_RESET_GPIO, IXP425_GPIO_HIGH);
/* wait a while to let other devices get ready after PCI reset */
udelay(1000);
}
static int __init ixdp2400_i2c_init(void)
{
if(machine_is_ixdp2400()) {
int i = 0;
/*
* GPIO2 needs to be high for SDA to work on this board
*/
gpio_line_set(IXDP2400_GPIO_HIGH, 1);
gpio_line_config(IXDP2400_GPIO_HIGH, GPIO_OUT);
ixdp2400_gpio.sda_gpio = IXDP2400_GPIO_SCL;
ixdp2400_gpio.scl_gpio = IXDP2400_GPIO_SDA;
gpio_line_config(ixdp2400_gpio.sda_gpio, GPIO_OUT);
gpio_line_config(ixdp2400_gpio.scl_gpio, GPIO_OUT);
gpio_line_set(ixdp2400_gpio.scl_gpio, 0);
gpio_line_set(ixdp2400_gpio.sda_gpio, 0);
gpio_line_config(ixdp2400_gpio.scl_gpio, GPIO_IN);
for(i = 0; i < 10; i++);
gpio_line_config(ixdp2400_gpio.sda_gpio, GPIO_IN);
}
if (i2c_bit_add_bus(&ixdp2400_i2c_adapter)) {
printk("i2c-ixdp2400: I2C adapter registration failed\n");
return -EIO;
} else printk("i2c-ixdp2400: I2C bus initialized\n");
return 0;
}
static void ixp2000_bit_setsda(void *data, int val)
{
if (val) {
gpio_line_config(ixp2000_sda_pin(data), GPIO_IN);
} else {
gpio_line_config(ixp2000_sda_pin(data), GPIO_OUT);
}
}
static void ixp2000_bit_setscl(void *data, int val)
{
int i = 5000;
if (val) {
gpio_line_config(ixp2000_scl_pin(data), GPIO_IN);
while(!gpio_line_get(ixp2000_scl_pin(data)) && i--);
} else {
gpio_line_config(ixp2000_scl_pin(data), GPIO_OUT);
}
}
static void ixdp2400_bit_setsda(void *data, int val)
{
struct ixdp2400_data *gpio = (struct ixdp2400_data*)data;
if(val) {
gpio_line_config(gpio->sda_gpio, GPIO_IN);
} else {
gpio_line_config(gpio->sda_gpio, GPIO_OUT);
}
// printk("SDA %d PDPR = %#010x\n", val, *IXP2000_GPIO_PDPR);
}
static void ixdp2400_bit_setscl(void *data, int val)
{
struct ixdp2400_data *gpio = (struct ixdp2400_data*)data;
int i = 5000;
if(val) {
gpio_line_config(gpio->scl_gpio, GPIO_IN);
while(!gpio_line_get(gpio->scl_gpio) && i--);
} else {
gpio_line_config(gpio->scl_gpio, GPIO_OUT);
}
}
void __init coyote_pci_preinit(void)
{
gpio_line_config(COYOTE_PCI_SLOT0_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_config(COYOTE_PCI_SLOT1_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN);
gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN);
ixp4xx_pci_preinit();
}
static int ixp4xx_i2c_probe(struct device *dev)
{
int err;
struct platform_device *plat_dev = to_platform_device(dev);
struct ixp4xx_i2c_pins *gpio = plat_dev->dev.platform_data;
struct ixp4xx_i2c_data *drv_data =
kmalloc(sizeof(struct ixp4xx_i2c_data), GFP_KERNEL);
if(!drv_data)
return -ENOMEM;
memzero(drv_data, sizeof(struct ixp4xx_i2c_data));
drv_data->gpio_pins = gpio;
/*
* We could make a lot of these structures static, but
* certain platforms may have multiple GPIO-based I2C
* buses for various device domains, so we need per-device
* algo_data->data.
*/
drv_data->algo_data.data = gpio;
drv_data->algo_data.setsda = ixp4xx_bit_setsda;
drv_data->algo_data.setscl = ixp4xx_bit_setscl;
drv_data->algo_data.getsda = ixp4xx_bit_getsda;
drv_data->algo_data.getscl = ixp4xx_bit_getscl;
drv_data->algo_data.udelay = 10;
drv_data->algo_data.mdelay = 10;
drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP4XX,
drv_data->adapter.algo_data = &drv_data->algo_data,
drv_data->adapter.dev.parent = &plat_dev->dev;
gpio_line_config(gpio->scl_pin, IXP4XX_GPIO_IN);
gpio_line_config(gpio->sda_pin, IXP4XX_GPIO_IN);
gpio_line_set(gpio->scl_pin, 0);
gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter) != 0)) {
printk(KERN_ERR "ERROR: Could not install %s\n", dev->bus_id);
kfree(drv_data);
return err;
}
dev_set_drvdata(&plat_dev->dev, drv_data);
return 0;
}
void snapi2c_setup(void)
{
down(&snapi2c_sem);
/* Initially set the IIC lines to be outputs from the IXP4xx */
gpio_line_config(SCL, OUT);
gpio_line_config(SDA, OUT);
/* Set IIC bus into idle mode */
gpio_line_set(SCL, 1);
gpio_line_set(SDA, 1);
up(&snapi2c_sem);
}
void __init bruce_pci_gpio_init(void)
{
/* configure PCI-related GPIO */
gpio_line_config(USB_GPIO, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(PATA_GPIO, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(SATA_GPIO, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(MINIPCI_GPIO, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(USB_GPIO);
gpio_line_isr_clear(PATA_GPIO);
gpio_line_isr_clear(SATA_GPIO);
gpio_line_isr_clear(MINIPCI_GPIO);
}
void __init coyote_pci_init(void *sysdata)
{
#ifdef CONFIG_PCI_RESET
if (ixp425_pci_is_host())
coyote_pci_hw_init();
#endif
gpio_line_config(IXP425_GPIO_PIN_11, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(IXP425_GPIO_PIN_6, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(IXP425_GPIO_PIN_11);
gpio_line_isr_clear(IXP425_GPIO_PIN_6);
ixp425_pci_init(sysdata);
}
static int __init fiq_init(void)
{
printk("FIQ: installing ERASE button debug FIQ handler\n");
#if 0
printk("CURRENT FIQ = %08x\n", *((unsigned int *) FIQ_VECTOR));
#endif
/* Configure Erase switch as IRQ/FIQ input */
gpio_line_config(ERASEGPIO, (IXP4XX_GPIO_IN));
set_irq_type(ERASEIRQ, IRQT_FALLING);
gpio_line_isr_clear(ERASEGPIO);
*IXP4XX_ICLR |= (1 << ERASEIRQ);
unprotect_page_0();
memcpy(FIQ_VECTOR, fiqasm, 96);
protect_page_0();
flush_icache_range(FIQ_VECTOR, FIQ_VECTOR + 96);
#if 0
printk("CURRENT FIQ = %08x\n", *((unsigned int *) FIQ_VECTOR));
#endif
return 0;
}
static void n2100_restart(char mode, const char *cmd)
{
gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW);
gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT);
while (1)
;
}
static int __init dsmg600_power_init(void)
{
if (!(machine_is_dsmg600()))
return 0;
if (request_irq(DSMG600_RB_IRQ, &dsmg600_reset_handler,
IRQF_DISABLED | IRQF_TRIGGER_LOW, "DSM-G600 reset button",
NULL) < 0) {
printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
DSMG600_RB_IRQ);
return -EIO;
}
/* The power button on the D-Link DSM-G600 is on GPIO 15, but
* it cannot handle interrupts on that GPIO line. So we'll
* have to poll it with a kernel timer.
*/
/* Make sure that the power button GPIO is set up as an input */
gpio_line_config(DSMG600_PB_GPIO, IXP4XX_GPIO_IN);
/* Set the initial value for the power button IRQ handler */
power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
mod_timer(&dsmg600_power_timer, jiffies + msecs_to_jiffies(500));
return 0;
}
static void __init ixdp425_init(void)
{
ixp4xx_sys_init();
ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
ixdp425_flash_resource.end =
IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
#if defined(CONFIG_MTD_NAND_PLATFORM) || \
defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
ixdp425_flash_nand_resource.end = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
/* Configure expansion bus for NAND Flash */
*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
IXP4XX_EXP_BUS_STROBE_T(1) | /* extend by 1 clock */
IXP4XX_EXP_BUS_CYCLES(0) | /* Intel cycles */
IXP4XX_EXP_BUS_SIZE(0) | /* 512bytes addr space*/
IXP4XX_EXP_BUS_WR_EN |
IXP4XX_EXP_BUS_BYTE_EN; /* 8 bit data bus */
#endif
if (cpu_is_ixp43x()) {
ixdp425_uart.num_resources = 1;
ixdp425_uart_data[1].flags = 0;
}
platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
}
void __init montejade_pci_init(void *sysdata)
{
printk("PCI: reset bus...\n");
gpio_line_set(IXP425_GPIO_PIN_8, 0);
gpio_line_config(IXP425_GPIO_PIN_8, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_8, 0);
mdelay(50);
gpio_line_set(IXP425_GPIO_PIN_8, 1);
mdelay(50);
gpio_line_config(INTA_PIN, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_config(INTB_PIN, IXP425_GPIO_IN | IXP425_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(INTA_PIN);
gpio_line_isr_clear(INTB_PIN);
ixp425_pci_init(sysdata);
}
static void dsmg600_power_off(void)
{
/* enable the pwr cntl gpio */
gpio_line_config(DSMG600_PO_GPIO, IXP4XX_GPIO_OUT);
/* poweroff */
gpio_line_set(DSMG600_PO_GPIO, IXP4XX_GPIO_HIGH);
}
static int ixp4xx_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
int level)
{
gpio_line_set(gpio, level);
gpio_line_config(gpio, IXP4XX_GPIO_OUT);
return 0;
}
void __init ixdp2x00_init_machine(void)
{
gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
ixp2000_uart_init();
}
static int ixp4xx_bit_getscl(void *data)
{
int scl;
gpio_line_config(ixp4xx_scl_pin(data), IXP4XX_GPIO_IN );
gpio_line_get(ixp4xx_scl_pin(data), &scl);
return scl;
}
static int ixp4xx_bit_getsda(void *data)
{
int sda;
gpio_line_config(ixp4xx_sda_pin(data), IXP4XX_GPIO_IN );
gpio_line_get(ixp4xx_sda_pin(data), &sda);
return sda;
}
void __init prpmc1100_pci_preinit(void)
{
gpio_line_config(PRPMC1100_PCI_INTA_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_config(PRPMC1100_PCI_INTB_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_config(PRPMC1100_PCI_INTC_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_config(PRPMC1100_PCI_INTD_PIN,
IXP4XX_GPIO_IN | IXP4XX_GPIO_ACTIVE_LOW);
gpio_line_isr_clear(PRPMC1100_PCI_INTA_PIN);
gpio_line_isr_clear(PRPMC1100_PCI_INTB_PIN);
gpio_line_isr_clear(PRPMC1100_PCI_INTC_PIN);
gpio_line_isr_clear(PRPMC1100_PCI_INTD_PIN);
ixp4xx_pci_preinit();
}
void __init ess710_pci_preinit(void)
{
printk("PCI: reset bus...\n");
gpio_line_set(13, 0);
gpio_line_config(13, IXP4XX_GPIO_OUT);
gpio_line_set(13, 0);
mdelay(50);
gpio_line_set(13, 1);
mdelay(50);
gpio_line_config(6, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); /* INTA */
gpio_line_config(7, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); /* INTB */
gpio_line_config(8, IXP4XX_GPIO_IN);
set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW); /* INTC */
ixp4xx_pci_preinit();
}
static void nslu2_power_off(void)
{
/* */
/* */
gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
/* */
gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
}
static void nas100d_power_off(void)
{
/* This causes the box to drop the power and go dead. */
/* enable the pwr cntl gpio */
gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
/* do the deed */
gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
}
void ivpnss_hwsetup(void)
{
int i;
if (ivpnss_hwinited)
return;
/* Setup IXP4xx chip selects, CS1 is for 8bit, CS2 is 16bit */
*IXP425_EXP_CS1 = 0x97d10c03;
*IXP425_EXP_CS2 = 0x97d10c02;
/* expansion bus speeds */
// *IXP425_GPIO_GPCLKR = (*IXP425_GPIO_GPCLKR & 0x0000ffff) | 0x01420000;
/* Setup IRQ line, we use GPIO7 which maps tp IRQ 24 */
gpio_line_config(IXP425_GPIO_PIN_7,
(IXP425_GPIO_IN | IXP425_GPIO_FALLING_EDGE));
gpio_line_isr_clear(IXP425_GPIO_PIN_7);
/* Setup PCMCIA/CF REG line (for accessing attribute space) */
gpio_line_config(IXP425_GPIO_PIN_10, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_10, 1);
/* Setup PCMCIA/CF IO/MEM (confusingly called RD/WR) select */
gpio_line_config(IXP425_GPIO_PIN_8, IXP425_GPIO_OUT);
gpio_line_set(IXP425_GPIO_PIN_10, 1);
/* Setup PCMCIA/CF RESET line, and issue a short reset */
gpio_line_set(IXP425_GPIO_PIN_6, 0);
gpio_line_config(IXP425_GPIO_PIN_6, IXP425_GPIO_OUT);
/*
for (i = 0; (i < 100); i++)
udelay(1000);
gpio_line_set(IXP425_GPIO_PIN_6, 1);
*/
/* Leave the region idling in "attribute" mode */
ivpnss_mem_mode = MODE_ATTRIBUTE;
ivpnss_enable_attribute();
ivpnss_hwinited = 1;
}
static void output_control(void)
{
int i;
gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT);
gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT);
for (i = 0; i < 8; i++) {
set_scl(0);
set_sda(control_value & (0x80 >> i)); /* MSB first */
set_scl(1); /* active edge */
}
set_str(1);
set_str(0);
set_scl(0);
set_sda(1); /* Be ready for START */
set_scl(1);
}
static void ixp4xx_spkr_control(unsigned int pin, unsigned int count)
{
unsigned long flags;
spin_lock_irqsave(&beep_lock, flags);
if (count) {
gpio_line_config(pin, IXP4XX_GPIO_OUT);
gpio_line_set(pin, IXP4XX_GPIO_LOW);
*IXP4XX_OSRT2 = (count & ~IXP4XX_OST_RELOAD_MASK) | IXP4XX_OST_ENABLE;
} else {
gpio_line_config(pin, IXP4XX_GPIO_IN);
gpio_line_set(pin, IXP4XX_GPIO_HIGH);
*IXP4XX_OSRT2 = 0;
}
spin_unlock_irqrestore(&beep_lock, flags);
}
static void output_control(void)
{
int i;
gpio_line_config(GPIO_SCL, IXP4XX_GPIO_OUT);
gpio_line_config(GPIO_SDA, IXP4XX_GPIO_OUT);
for (i = 0; i < 8; i++) {
set_scl(0);
set_sda(control_value & (0x80 >> i)); /* */
set_scl(1); /* */
}
set_str(1);
set_str(0);
set_scl(0);
set_sda(1); /* */
set_scl(1);
}
static int ixp2000_i2c_probe(struct platform_device *plat_dev)
{
int err;
struct ixp2000_i2c_pins *gpio = plat_dev->dev.platform_data;
struct ixp2000_i2c_data *drv_data =
kzalloc(sizeof(struct ixp2000_i2c_data), GFP_KERNEL);
if (!drv_data)
return -ENOMEM;
drv_data->gpio_pins = gpio;
drv_data->algo_data.data = gpio;
drv_data->algo_data.setsda = ixp2000_bit_setsda;
drv_data->algo_data.setscl = ixp2000_bit_setscl;
drv_data->algo_data.getsda = ixp2000_bit_getsda;
drv_data->algo_data.getscl = ixp2000_bit_getscl;
drv_data->algo_data.udelay = 6;
drv_data->algo_data.timeout = 100;
drv_data->adapter.id = I2C_HW_B_IXP2000,
strlcpy(drv_data->adapter.name, plat_dev->dev.driver->name,
sizeof(drv_data->adapter.name));
drv_data->adapter.algo_data = &drv_data->algo_data,
drv_data->adapter.dev.parent = &plat_dev->dev;
gpio_line_config(gpio->sda_pin, GPIO_IN);
gpio_line_config(gpio->scl_pin, GPIO_IN);
gpio_line_set(gpio->scl_pin, 0);
gpio_line_set(gpio->sda_pin, 0);
if ((err = i2c_bit_add_bus(&drv_data->adapter)) != 0) {
dev_err(&plat_dev->dev, "Could not install, error %d\n", err);
kfree(drv_data);
return err;
}
platform_set_drvdata(plat_dev, drv_data);
return 0;
}
