static void write_config_reg(struct pinmux_info *gpioc, struct pinmux_cfg_reg *crp, unsigned long field, unsigned long value) { void __iomem *mapped_reg; unsigned long mask, pos, data; config_reg_helper(gpioc, crp, field, &mapped_reg, &mask, &pos); pr_debug("write_reg addr = %lx, value = %ld, field = %ld, " "r_width = %ld, f_width = %ld\n", crp->reg, value, field, crp->reg_width, crp->field_width); mask = ~(mask << pos); value = value << pos; data = gpio_read_raw_reg(mapped_reg, crp->reg_width); data &= mask; data |= value; if (gpioc->unlock_reg) gpio_write_raw_reg(pfc_phys_to_virt(gpioc, gpioc->unlock_reg), 32, ~data); gpio_write_raw_reg(mapped_reg, crp->reg_width, data); }
static int gpio_read_reg(unsigned long reg, unsigned long reg_width, unsigned long field_width, unsigned long in_pos) { unsigned long data, mask, pos; data = 0; mask = (1 << field_width) - 1; pos = reg_width - ((in_pos + 1) * field_width); pr_debug("read_reg: addr = %lx, pos = %ld, " "r_width = %ld, f_width = %ld\n", reg, pos, reg_width, field_width); data = gpio_read_raw_reg(reg, reg_width); return (data >> pos) & mask; }
static void setup_data_regs(struct pinmux_info *gpioc) { struct pinmux_data_reg *drp; int k; for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++) setup_data_reg(gpioc, k); k = 0; while (1) { drp = gpioc->data_regs + k; if (!drp->reg_width) break; drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width); k++; } }