static void mxc_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { unsigned long flags; /* * The timer interrupt generation is disabled at least * for enough time to call mxc_set_next_event() */ local_irq_save(flags); /* Disable interrupt in GPT module */ gpt_irq_disable(); if (mode != clockevent_mode) { /* Set event time into far-far future */ if (timer_is_v2()) __raw_writel(__raw_readl(timer_base + V2_TCN) - 3, timer_base + V2_TCMP); else __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, timer_base + MX1_2_TCMP); /* Clear pending interrupt */ gpt_irq_acknowledge(); } #ifdef DEBUG printk(KERN_INFO "mxc_set_mode: changing mode from %s to %s\n", clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]); #endif /* DEBUG */ /* Remember timer mode */ clockevent_mode = mode; local_irq_restore(flags); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: printk(KERN_ERR"mxc_set_mode: Periodic mode is not " "supported for i.MX\n"); break; case CLOCK_EVT_MODE_ONESHOT: /* * Do not put overhead of interrupt enable/disable into * mxc_set_next_event(), the core has about 4 minutes * to call mxc_set_next_event() or shutdown clock after * mode switching */ local_irq_save(flags); gpt_irq_enable(); local_irq_restore(flags); break; case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_RESUME: /* Left event sources disabled, no more interrupts appear */ break; } }
static void mxc_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { unsigned long flags; local_irq_save(flags); gpt_irq_disable(); if (mode != clockevent_mode) { if (cpu_is_mx3() || cpu_is_mx25()) __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, timer_base + MX3_TCMP); else __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, timer_base + MX1_2_TCMP); gpt_irq_acknowledge(); } #ifdef DEBUG printk(KERN_INFO "mxc_set_mode: changing mode from %s to %s\n", clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]); #endif clockevent_mode = mode; local_irq_restore(flags); switch (mode) { case CLOCK_EVT_MODE_PERIODIC: printk(KERN_ERR"mxc_set_mode: Periodic mode is not " "supported for i.MX\n"); break; case CLOCK_EVT_MODE_ONESHOT: local_irq_save(flags); gpt_irq_enable(); local_irq_restore(flags); break; case CLOCK_EVT_MODE_SHUTDOWN: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_RESUME: break; } }
/* * IRQ handler for the timer */ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_mxc; uint32_t tstat; tstat = __raw_readl(TIMER_BASE + MXC_TSTAT); gpt_irq_acknowledge(); evt->event_handler(evt); return IRQ_HANDLED; }
/* * IRQ handler for the timer */ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_mxc; uint32_t tstat; if (timer_is_v2()) tstat = __raw_readl(timer_base + V2_TSTAT); else tstat = __raw_readl(timer_base + MX1_2_TSTAT); gpt_irq_acknowledge(); evt->event_handler(evt); return IRQ_HANDLED; }
/* * IRQ handler for the timer */ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_mxc; uint32_t tstat; if (timer_is_v2()) tstat = __raw_readl(timer_base + V2_TSTAT); else tstat = __raw_readl(timer_base + MX1_2_TSTAT); #ifndef CONFIG_IPIPE gpt_irq_acknowledge(); #else /* !CONFIG_IPIPE */ __ipipe_tsc_update(); #endif /* !CONFIG_IPIPE */ evt->event_handler(evt); return IRQ_HANDLED; }
void __ipipe_mach_acktimer(void) { gpt_irq_acknowledge(); }