static int gpu_set_voltage_post(struct exynos_context *platform, bool is_up) { if (!platform) return -ENODEV; if (is_up && platform->dynamic_abb_status) set_match_abb(ID_G3D, gpu_dvfs_get_cur_asv_abb()); return 0; }
int gpu_disable_dvs(struct exynos_context *platform) { if (!platform->dvs_status) return 0; if (!cal_get_fs_abb()) { if (set_match_abb(ID_G3D, gpu_dvfs_get_cur_asv_abb())) { GPU_LOG(DVFS_ERROR, DUMMY, 0u, 0u, "%s: failed to restore RBB setting\n", __func__); return -1; } } #if defined(CONFIG_REGULATOR_S2MPS13) if (s2m_set_dvs_pin(false) != 0) { GPU_LOG(DVFS_ERROR, DUMMY, 0u, 0u, "%s: failed to disable dvs\n", __func__); return -1; } #endif /* CONFIG_REGULATOR_S2MPS13 */ GPU_LOG(DVFS_INFO, DUMMY, 0u, 0u, "dvs is disabled (vol: %d)\n", gpu_get_cur_voltage(platform)); return 0; }