Example #1
0
static int hdmi_power_on(struct omap_dss_device *dssdev)
{
	int r;
	const struct hdmi_config *timing;
	struct omap_video_timings *p;
	unsigned long phy;

	r = hdmi_runtime_get();
	if (r)
		return r;

	if (cpu_is_omap54xx()) {
		r = regulator_enable(hdmi.vdds_hdmi);
		if (r)
			goto err;
	}

	dss_mgr_disable(dssdev->manager);

	p = &dssdev->panel.timings;

	DSSDBG("hdmi_power_on x_res= %d y_res = %d\n",
		dssdev->panel.timings.x_res,
		dssdev->panel.timings.y_res);

	timing = hdmi_get_timings();
	if (timing == NULL) {
		/* HDMI code 4 corresponds to 640 * 480 VGA */
		hdmi.ip_data.cfg.cm.code = 4;
		/* DVI mode 1 corresponds to HDMI 0 to DVI */
		hdmi.ip_data.cfg.cm.mode = HDMI_DVI;
		hdmi.ip_data.cfg = vesa_timings[0];
	} else {
		hdmi.ip_data.cfg = *timing;
	}

	switch (hdmi.ip_data.cfg.deep_color) {
	case HDMI_DEEP_COLOR_30BIT:
		phy = (p->pixel_clock * 125) / 100 ;
		break;
	case HDMI_DEEP_COLOR_36BIT:
		if (p->pixel_clock >= 148500) {
			DSSERR("36 bit deep color not supported for the \
				pixel clock %d\n", p->pixel_clock);
			goto err;
		}
		phy = (p->pixel_clock * 150) / 100;
		break;
	case HDMI_DEEP_COLOR_24BIT:
	default:
		phy = p->pixel_clock;
		break;
	}
Example #2
0
void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev,
		struct omap_video_timings *timings)
{
	struct hdmi_cm cm;
	const struct hdmi_config *t;

	mutex_lock(&hdmi.lock);

	cm = hdmi_get_code(timings);
	hdmi.ip_data.cfg.cm = cm;

	t = hdmi_get_timings();
	if (t != NULL)
		hdmi.ip_data.cfg = *t;

	mutex_unlock(&hdmi.lock);
}