static void hi3660_clk_crgctrl_init(struct device_node *np)
{
	struct hisi_clock_data *clk_data;
	int nr = ARRAY_SIZE(hi3660_fixed_rate_clks) +
		 ARRAY_SIZE(hi3660_crgctrl_gate_sep_clks) +
		 ARRAY_SIZE(hi3660_crgctrl_gate_clks) +
		 ARRAY_SIZE(hi3660_crgctrl_mux_clks) +
		 ARRAY_SIZE(hi3660_crg_fixed_factor_clks) +
		 ARRAY_SIZE(hi3660_crgctrl_divider_clks);

	clk_data = hisi_clk_init(np, nr);
	if (!clk_data)
		return;

	hisi_clk_register_fixed_rate(hi3660_fixed_rate_clks,
				     ARRAY_SIZE(hi3660_fixed_rate_clks),
				     clk_data);
	hisi_clk_register_gate_sep(hi3660_crgctrl_gate_sep_clks,
				   ARRAY_SIZE(hi3660_crgctrl_gate_sep_clks),
				   clk_data);
	hisi_clk_register_gate(hi3660_crgctrl_gate_clks,
			       ARRAY_SIZE(hi3660_crgctrl_gate_clks),
			       clk_data);
	hisi_clk_register_mux(hi3660_crgctrl_mux_clks,
			      ARRAY_SIZE(hi3660_crgctrl_mux_clks),
			      clk_data);
	hisi_clk_register_fixed_factor(hi3660_crg_fixed_factor_clks,
				       ARRAY_SIZE(hi3660_crg_fixed_factor_clks),
				       clk_data);
	hisi_clk_register_divider(hi3660_crgctrl_divider_clks,
				  ARRAY_SIZE(hi3660_crgctrl_divider_clks),
				  clk_data);
}
Example #2
0
static void __init hi3620_clk_init(struct device_node *np)
{
	struct hisi_clock_data *clk_data;

	clk_data = hisi_clk_init(np, HI3620_NR_CLKS);
	if (!clk_data)
		return;

	hisi_clk_register_fixed_rate(hi3620_fixed_rate_clks,
				     ARRAY_SIZE(hi3620_fixed_rate_clks),
				     clk_data);
	hisi_clk_register_fixed_factor(hi3620_fixed_factor_clks,
				       ARRAY_SIZE(hi3620_fixed_factor_clks),
				       clk_data);
	hisi_clk_register_mux(hi3620_mux_clks, ARRAY_SIZE(hi3620_mux_clks),
			      clk_data);
	hisi_clk_register_divider(hi3620_div_clks, ARRAY_SIZE(hi3620_div_clks),
				  clk_data);
	hisi_clk_register_gate_sep(hi3620_separated_gate_clks,
				   ARRAY_SIZE(hi3620_separated_gate_clks),
				   clk_data);
}