int __iorpc_close_pollfd(int fd, int pollfd_cookie)
{
struct close_pollfd_param temp;
struct close_pollfd_param *params = &temp;
params->pollfd.kernel.cookie = pollfd_cookie;
return hv_dev_pwrite(fd, 0, (HV_VirtAddr) params, sizeof(*params),
IORPC_OP_CLOSE_POLLFD);
}
int gxio_trio_force_ep_link_up(gxio_trio_context_t * context, unsigned int mac)
{
struct force_ep_link_up_param temp;
struct force_ep_link_up_param *params = &temp;
params->mac = mac;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_FORCE_EP_LINK_UP);
}
static int tile_srom_write(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const unsigned char *buf)
{
struct tile_srom_dev *dev = to_tile_srom_dev(mtd);
int curoff = 0;
int returned = 0;
/* Sanity checks */
if (!len)
return 0;
if (to + len > mtd->size)
return -EINVAL;
curoff = (u32) to & (mtd->writesize - 1);
to -= curoff;
while (len) {
int thislen;
int hv_retval;
char wr_buf[mtd->writesize];
thislen = (mtd->writesize - curoff > len)
? len
: mtd->writesize - curoff;
memset(wr_buf, 0xFF, mtd->writesize);
memcpy(wr_buf + curoff, buf, thislen);
hv_retval = hv_dev_pwrite(dev->hv_devhdl, 0,
(HV_VirtAddr) wr_buf,
mtd->writesize, (u32) to);
if (hv_retval != mtd->writesize) {
DEBUG(MTD_DEBUG_LEVEL1, "hv_dev_pwrite failed,"
" error %d\n", hv_retval);
if (retlen)
*retlen = returned;
return -EIO;
}
len -= thislen;
buf += thislen;
returned += thislen;
to += mtd->writesize;
/* We only have an offset once. */
curoff = 0;
}
if (retlen)
*retlen = returned;
return 0;
}
int __iorpc_check_mmio_offset(int fd, unsigned long offset, unsigned long size)
{
struct check_mmio_offset_param temp;
struct check_mmio_offset_param *params = &temp;
params->offset = offset;
params->size = size;
return hv_dev_pwrite(fd, 0, (HV_VirtAddr) params, sizeof(*params),
IORPC_OP_CHECK_MMIO_OFFSET);
}
int gxio_uart_check_mmio_offset(gxio_uart_context_t *context,
unsigned long offset, unsigned long size)
{
struct check_mmio_offset_param temp;
struct check_mmio_offset_param *params = &temp;
params->offset = offset;
params->size = size;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_UART_OP_CHECK_MMIO_OFFSET);
}
int gxio_usb_host_register_client_memory(gxio_usb_host_context_t * context,
HV_PTE pte, unsigned int flags)
{
struct register_client_memory_param temp;
struct register_client_memory_param *params = &temp;
params->pte = pte;
params->flags = flags;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params),
GXIO_USB_HOST_OP_REGISTER_CLIENT_MEMORY);
}
int gxio_trio_set_mps_mrs(gxio_trio_context_t * context, uint16_t mps,
uint16_t mrs, unsigned int mac)
{
struct set_mps_mrs_param temp;
struct set_mps_mrs_param *params = &temp;
params->mps = mps;
params->mrs = mrs;
params->mac = mac;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_SET_MPS_MRS);
}
int gxio_trio_alloc_asids(gxio_trio_context_t * context, unsigned int count,
unsigned int first, unsigned int flags)
{
struct alloc_asids_param temp;
struct alloc_asids_param *params = &temp;
params->count = count;
params->first = first;
params->flags = flags;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_ALLOC_ASIDS);
}
int gxio_usb_host_cfg_interrupt(gxio_usb_host_context_t * context, int inter_x,
int inter_y, int inter_ipi, int inter_event)
{
struct cfg_interrupt_param temp;
struct cfg_interrupt_param *params = &temp;
params->interrupt.kernel.x = inter_x;
params->interrupt.kernel.y = inter_y;
params->interrupt.kernel.ipi = inter_ipi;
params->interrupt.kernel.event = inter_event;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_USB_HOST_OP_CFG_INTERRUPT);
}
int gxio_trio_init_pio_region_aux(gxio_trio_context_t * context,
unsigned int pio_region, unsigned int mac,
uint32_t bus_address_hi, unsigned int flags)
{
struct init_pio_region_aux_param temp;
struct init_pio_region_aux_param *params = &temp;
params->pio_region = pio_region;
params->mac = mac;
params->bus_address_hi = bus_address_hi;
params->flags = flags;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_INIT_PIO_REGION_AUX);
}
int gxio_trio_config_legacy_intr(gxio_trio_context_t * context, int inter_x,
int inter_y, int inter_ipi, int inter_event,
unsigned int mac, unsigned int intx)
{
struct config_legacy_intr_param temp;
struct config_legacy_intr_param *params = &temp;
params->interrupt.kernel.x = inter_x;
params->interrupt.kernel.y = inter_y;
params->interrupt.kernel.ipi = inter_ipi;
params->interrupt.kernel.event = inter_event;
params->mac = mac;
params->intx = intx;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_CONFIG_LEGACY_INTR);
}
static int tile_srom_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct tile_srom_dev *dev = to_tile_srom_dev(mtd);
u32 addr, end;
/* Sanity checks */
if (instr->addr + instr->len > mtd->size)
return -EINVAL;
if ((u32)instr->len & (mtd->erasesize - 1)) {
pr_err("tile_srom: erase length invalid: erase size %#x, "
"length %#x\n", mtd->erasesize, (u32)instr->len);
return -EINVAL;
}
if ((u32)instr->addr & (mtd->erasesize - 1)) {
pr_err("tile_srom: erase addr invalid: erase size %#X, "
"addr %#x\n", mtd->erasesize, (u32)instr->addr);
return -EINVAL;
}
addr = instr->addr;
end = addr + instr->len;
while (addr < end) {
int hv_retval;
char dummy = 0;
hv_retval = hv_dev_pwrite(dev->hv_devhdl, 0,
(HV_VirtAddr)&dummy, sizeof(dummy),
SROM_ERASE_OFF | (u32) addr);
if (hv_retval != sizeof(dummy)) {
DEBUG(MTD_DEBUG_LEVEL1, "hv_dev_pwrite for erase"
" failed, error %d\n", hv_retval);
return -EIO;
}
addr += mtd->erasesize;
}
instr->state = MTD_ERASE_DONE;
mtd_erase_callback(instr);
return 0;
}
/*
* If the termios OPOST bit is set then the write_room method will be
* called to find out how much space should be passed in one write.
* If the OPOST bit is not set then softuart_write will be called with
* as much as the higher level has to write, and any unwritten data
* will be immediately retried.
*/
static int softuart_write(struct tty_struct *tty,
const unsigned char *buf, int count)
{
struct softuart_private *softuartp = tty->driver_data;
unsigned long flags;
int retval = 0;
spin_lock_irqsave(&softuartp->lock, flags);
retval = hv_dev_pwrite(softuart_fd, 0, (HV_VirtAddr)buf, count, 0);
if (retval < 0) {
pr_err("softuart: Unable to write to HV: %d\n", retval);
count = 0;
}
spin_unlock_irqrestore(&softuartp->lock, flags);
return retval;
}
int gxio_trio_config_msi_intr(gxio_trio_context_t * context, int inter_x,
int inter_y, int inter_ipi, int inter_event,
unsigned int mac, unsigned int mem_map,
uint64_t mem_map_base, uint64_t mem_map_limit,
unsigned int asid)
{
struct config_msi_intr_param temp;
struct config_msi_intr_param *params = &temp;
params->interrupt.kernel.x = inter_x;
params->interrupt.kernel.y = inter_y;
params->interrupt.kernel.ipi = inter_ipi;
params->interrupt.kernel.event = inter_event;
params->mac = mac;
params->mem_map = mem_map;
params->mem_map_base = mem_map_base;
params->mem_map_limit = mem_map_limit;
params->asid = asid;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params), GXIO_TRIO_OP_CONFIG_MSI_INTR);
}
int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t * context,
unsigned int map, unsigned long va,
uint64_t size, unsigned int asid,
unsigned int mac, uint64_t bus_address,
unsigned int node,
unsigned int order_mode)
{
struct init_memory_map_mmu_aux_param temp;
struct init_memory_map_mmu_aux_param *params = &temp;
params->map = map;
params->va = va;
params->size = size;
params->asid = asid;
params->mac = mac;
params->bus_address = bus_address;
params->node = node;
params->order_mode = order_mode;
return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
sizeof(*params),
GXIO_TRIO_OP_INIT_MEMORY_MAP_MMU_AUX);
}
/*
* Pass the downcall handle to the HV so it can interrupt us.
*/
static int softuart_configure_downcall(u32 intarg)
{
return hv_dev_pwrite(softuart_fd, 0, (HV_VirtAddr)&intarg,
sizeof(u32), SOFTUART_INTARG);
}
