short i2c_get_byte(char slaveAddr, char dataAddr)
{
i2c_start(); // ST
i2c_address(slaveAddr, 0); // SAD + W
i2c_write(dataAddr); // SUB
i2c_restart(); // SR?
i2c_address(slaveAddr, 1); // SAD + R
char data1 = i2c_read(0); // DATA
i2c_stop(); // STOP
return data1;
}
unsigned short i2c_get_udata(char mAddr, char addr)
{
i2c_start();
i2c_address(mAddr, 0);
i2c_write(addr);
i2c_restart();
i2c_address(mAddr, 1);
unsigned char data1 = i2c_read(1);
unsigned char data0 = i2c_read(0);
i2c_stop();
return data0 + (data1 << 8);
}
void i2c_writeToReg(char slaveAddr, char destAddr, char sendData)
{
i2c_start();
i2c_address(slaveAddr, 0);
i2c_write(destAddr);
i2c_write(sendData);
i2c_stop();
}
void i2c_write_raw(char cnt, char cmd)
{
i2c_start();
i2c_address(0x77, 0);
i2c_write(cnt);
i2c_write(cmd);
i2c_stop();
}
static void decode_i2cstat(lpc17xx_i2c_config_t *config, int status) {
error_code_t error = NO_ERROR;
i2c_command_t *cmd = config->buffer;
if (cmd->expected_status != status || status == ERROR) {
cmd->expected_status = ERROR;
//TODO: Should I issue a STOP command?
} else {
switch (status) {
case START:
//Send Address byte.
//After Sending the address, next status should be SLA+W ACK.
error = i2c_clear_start(config);
cmd->expected_status = MASTER_SLAVEWr_ACK ;
error |= i2c_address(config, WRITE);
break;
case MASTER_SLAVEWr_ACK:
//Send Register to Write.
error = i2c_reg(config);
cmd->expected_status = MASTER_DATAWr_ACK;
break;
case MASTER_DATAWr_ACK:
//If operation is read, RESTART.
if (cmd->operation == READ) {
cmd->expected_status = RESTART;
error = i2c_set_start(config);
//Else,just send the data.
} else if (cmd->data_written < cmd->size ) {
error = i2c_data_write(config, cmd->data[cmd->data_written]);
cmd->data_written++;
//If previous send was the last byte, then next should be STOP.
} else {
cmd->expected_status = IDLE;
error = i2c_stop(config);
}
break;
case RESTART:
//Send address byte, with direction bit set to READ. I2C will ACK the address.
error = i2c_clear_start(config);
cmd->expected_status = MASTER_SLARd_ACK ;
error |= i2c_address(config, READ);
break;
case MASTER_SLARd_ACK:
//I2C will receive the first byte, set the ACK bit.
if (cmd->data_written == ( cmd->size - 1) ) {
error |= i2c_clear_ack(config);
cmd->expected_status = MASTER_DATARd_NAK;
} else {
error = i2c_set_ack(config);
cmd->expected_status = MASTER_DATARd_ACK;
}
break;
case MASTER_DATARd_ACK:
error = i2c_data_read(config);
//A byte of data was received.
cmd->data_written++;
if (cmd->data_written == ( cmd->size - 1) ) {
//The next byte will be the last byte, send a NAK.
error |= i2c_clear_ack(config);
cmd->expected_status = MASTER_DATARd_NAK;
} else {
error |= i2c_set_ack(config);
cmd->expected_status = MASTER_DATARd_ACK;
}
break;
case MASTER_DATARd_NAK:
error = i2c_data_read(config);
cmd->expected_status = IDLE;
i2c_stop(config);
break;
default:
break;
}
}
if (error != NO_ERROR) {
cmd->expected_status = ERROR;
}
i2c_clear_interrupt(config);
}
