static int i2s_configure(struct tegra_i2s_info *info )
{
struct platform_device *pdev = info->pdev;
struct tegra_audio_platform_data *pdata = pdev->dev.platform_data;
unsigned int i2s_id = pdev->id;
unsigned int rate;
i2s_enable_fifos(i2s_id, 0);
i2s_fifo_clear(i2s_id, I2S_FIFO_TX);
i2s_fifo_clear(i2s_id, I2S_FIFO_RX);
i2s_set_left_right_control_polarity(i2s_id, 0); /* default */
rate = clk_get_rate(info->i2s_clk);
if (info->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP)
rate *= 2;
i2s_set_master(i2s_id, pdata->i2s_master);
info->i2s_master = pdata->i2s_master;
if (pdata->i2s_master && pdata->i2s_master_clk)
i2s_set_channel_bit_count(i2s_id, pdata->i2s_master_clk, rate);
i2s_set_fifo_mode(i2s_id, I2S_FIFO_TX, 1);
i2s_set_fifo_mode(i2s_id, I2S_FIFO_RX, 0);
i2s_set_bit_format(i2s_id, pdata->mode);
i2s_set_bit_size(i2s_id, pdata->bit_size);
i2s_set_fifo_format(i2s_id, pdata->fifo_fmt);
if (i2s_id == 0)
en_dmic = pdata->en_dmic;
return 0;
}
int set_i2s_dev_prop(int dev_id,
struct am_ch_info *ch,
struct audio_dev_property *dev_prop)
{
int bitsize = AUDIO_BIT_SIZE_16;
ch->outcif.audio_channels = dev_prop->num_channels - 1;
ch->outcif.client_channels = dev_prop->num_channels - 1;
bitsize = get_bit_size(dev_prop->bits_per_sample);
ch->outcif.audio_bits = bitsize;
ch->outcif.client_bits = bitsize;
ch->data_format = AUDIO_FRAME_FORMAT_I2S;
switch (dev_prop->dac_dap_data_comm_format) {
case dac_dap_data_format_dsp:
ch->data_format = AUDIO_FRAME_FORMAT_DSP;
break;
default:
ch->data_format = AUDIO_FRAME_FORMAT_I2S;
break;
}
ch->lrck_polarity = (dev_prop->lrck_high_left) ? 1 : 0;
i2s_set_samplerate(dev_id, dev_prop->rate);
i2s_set_bit_format(dev_id, ch->data_format);
i2s_set_left_right_control_polarity(dev_id, ch->lrck_polarity);
i2s_set_acif(dev_id, AUDIO_TX_MODE, &ch->outcif);
/* separate incif & outcif as needed */
i2s_set_acif(dev_id, AUDIO_RX_MODE, &ch->outcif);
return 0;
}
static int tegra_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
struct tegra_i2s_info *info = cpu_dai->private_data;
unsigned int i2s_id = cpu_dai->id;
int val1, val2;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
val1 = 1;
break;
case SND_SOC_DAIFMT_CBM_CFM:
val1 = 0;
break;
case SND_SOC_DAIFMT_CBS_CFM:
case SND_SOC_DAIFMT_CBM_CFS:
/* Tegra does not support different combinations of
* master and slave for FSYNC and BCLK */
default:
return -EINVAL;
}
i2s_set_master(i2s_id, val1);
info->i2s_master = val1;
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_A:
val1 = I2S_BIT_FORMAT_DSP;
val2 = 0;
break;
case SND_SOC_DAIFMT_DSP_B:
val1 = I2S_BIT_FORMAT_DSP;
val2 = 1;
break;
case SND_SOC_DAIFMT_I2S:
val1 = I2S_BIT_FORMAT_I2S;
val2 = 0;
break;
case SND_SOC_DAIFMT_RIGHT_J:
val1 = I2S_BIT_FORMAT_RJM;
val2 = 0;
break;
case SND_SOC_DAIFMT_LEFT_J:
val1 = I2S_BIT_FORMAT_LJM;
val2 = 0;
break;
default:
return -EINVAL;
}
i2s_set_bit_format(i2s_id, val1);
i2s_set_left_right_control_polarity(i2s_id, val2);
return 0;
}
int am_set_device_format(aud_dev_info* devinfo, am_dev_format_info *format)
{
if (devinfo->dev_type == AUDIO_I2S_DEVICE) {
i2s_set_loopback(devinfo->dev_id, format->loopmode);
i2s_set_master(devinfo->dev_id, format->mastermode);
i2s_set_bit_format(devinfo->dev_id, format->audiomode);
i2s_set_left_right_control_polarity(
devinfo->dev_id,
format->polarity);
} else if (devinfo->dev_type == AUDIO_SPDIF_DEVICE) {
}
return 0;
}
static int i2s_configure(struct tegra_i2s_info *info )
{
struct platform_device *pdev = info->pdev;
struct tegra_audio_platform_data *pdata = pdev->dev.platform_data;
struct clk *i2s_clk;
unsigned int i2s_id = pdev->id;
unsigned int rate;
i2s_enable_fifos(i2s_id, 0);
i2s_fifo_clear(i2s_id, I2S_FIFO_TX);
i2s_fifo_clear(i2s_id, I2S_FIFO_RX);
i2s_set_left_right_control_polarity(i2s_id, 0); /* default */
i2s_clk = clk_get(&pdev->dev, NULL);
if (!i2s_clk) {
dev_err(&pdev->dev, "%s: could not get i2s clock\n",
__func__);
return -EIO;
}
rate = clk_get_rate(i2s_clk);
if (info->bit_format == TEGRA_AUDIO_BIT_FORMAT_DSP)
rate *= 2;
if (pdata->i2s_master && pdata->i2s_master_clk)
i2s_set_channel_bit_count(i2s_id, pdata->i2s_master_clk, rate);
i2s_set_master(i2s_id, pdata->i2s_master);
i2s_set_fifo_mode(i2s_id, I2S_FIFO_TX, 1);
i2s_set_fifo_mode(i2s_id, I2S_FIFO_RX, 0);
i2s_set_bit_format(i2s_id, pdata->mode);
i2s_set_bit_size(i2s_id, pdata->bit_size);
i2s_set_fifo_format(i2s_id, pdata->fifo_fmt);
return 0;
}
static int tegra_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
unsigned int fmt)
{
int val1;
int val2;
unsigned int i2s_id = cpu_dai->id;
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBS_CFS:
val1 = 1;
break;
case SND_SOC_DAIFMT_CBM_CFM:
val1= 0;
break;
case SND_SOC_DAIFMT_CBS_CFM:
case SND_SOC_DAIFMT_CBM_CFS:
/* Tegra does not support different combinations of
* master and slave for FSYNC and BCLK */
default:
return -EINVAL;
}
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_A:
val1 = I2S_BIT_FORMAT_DSP;
val2 = 0;
break;
case SND_SOC_DAIFMT_DSP_B:
val1 = I2S_BIT_FORMAT_DSP;
val2 = 1;
break;
case SND_SOC_DAIFMT_I2S:
val1 = I2S_BIT_FORMAT_I2S;
val2 = 0;
break;
case SND_SOC_DAIFMT_RIGHT_J:
val1 = I2S_BIT_FORMAT_RJM;
val2 = 0;
break;
case SND_SOC_DAIFMT_LEFT_J:
val1 = I2S_BIT_FORMAT_LJM;
val2 = 0;
break;
default:
return -EINVAL;
}
i2s_set_bit_format(i2s_id,val1);
i2s_set_left_right_control_polarity(i2s_id,val2);
/* Clock inversion */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_A:
case SND_SOC_DAIFMT_DSP_B:
/* frame inversion not valid for DSP modes */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_IB_NF:
/* aif1 |= WM8903_AIF_BCLK_INV; */
break;
default:
return -EINVAL;
}
break;
case SND_SOC_DAIFMT_I2S:
case SND_SOC_DAIFMT_RIGHT_J:
case SND_SOC_DAIFMT_LEFT_J:
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_NB_NF:
break;
case SND_SOC_DAIFMT_IB_IF:
/* aif1 |= WM8903_AIF_BCLK_INV |
* WM8903_AIF_LRCLK_INV; */
break;
case SND_SOC_DAIFMT_IB_NF:
/* aif1 |= WM8903_AIF_BCLK_INV; */
break;
case SND_SOC_DAIFMT_NB_IF:
/* aif1 |= WM8903_AIF_LRCLK_INV; */
break;
default:
return -EINVAL;
}
break;
default:
return -EINVAL;
}
return 0;
}
