static ib_api_status_t vlarb_update_table_block(osm_sm_t * sm,
osm_physp_t * p,
uint8_t port_num,
unsigned force_update,
const ib_vl_arb_table_t *
table_block,
unsigned block_length,
unsigned block_num,
cl_qlist_t *mad_list)
{
struct osm_routing_engine *re = sm->p_subn->p_osm->routing_engine_used;
ib_vl_arb_table_t block;
uint32_t attr_mod;
unsigned vl_mask, i;
qos_mad_item_t *p_mad;
vl_mask = (1 << (ib_port_info_get_op_vls(&p->port_info) - 1)) - 1;
memset(&block, 0, sizeof(block));
memcpy(&block, table_block, block_length * sizeof(block.vl_entry[0]));
if (re && re->update_vlarb)
re->update_vlarb(re->context, p, port_num, &block,
block_length, block_num);
for (i = 0; i < block_length; i++)
block.vl_entry[i].vl &= vl_mask;
if (!force_update &&
!memcmp(&p->vl_arb[block_num], &block,
block_length * sizeof(block.vl_entry[0])))
return IB_SUCCESS;
attr_mod = ((block_num + 1) << 16) | port_num;
p_mad = osm_qos_mad_create(sm,p,sizeof(block),(uint8_t *) & block,
IB_MAD_ATTR_VL_ARBITRATION, attr_mod);
if (!p_mad)
return IB_INSUFFICIENT_MEMORY;
cl_qlist_insert_tail(mad_list, &p_mad->list_item);
return IB_SUCCESS;
}
static ib_api_status_t sl2vl_update_table(osm_sm_t * sm,
osm_physp_t * p, uint8_t in_port,
uint8_t out_port,
unsigned force_update,
const ib_slvl_table_t * sl2vl_table)
{
osm_madw_context_t context;
ib_slvl_table_t tbl, *p_tbl;
osm_node_t *p_node = osm_physp_get_node_ptr(p);
uint32_t attr_mod;
unsigned vl_mask;
uint8_t vl1, vl2;
int i;
vl_mask = (1 << (ib_port_info_get_op_vls(&p->port_info) - 1)) - 1;
for (i = 0; i < IB_MAX_NUM_VLS / 2; i++) {
vl1 = sl2vl_table->raw_vl_by_sl[i] >> 4;
vl2 = sl2vl_table->raw_vl_by_sl[i] & 0xf;
if (vl1 != 15)
vl1 &= vl_mask;
if (vl2 != 15)
vl2 &= vl_mask;
tbl.raw_vl_by_sl[i] = (vl1 << 4) | vl2;
}
if (!force_update && (p_tbl = osm_physp_get_slvl_tbl(p, in_port)) &&
!memcmp(p_tbl, &tbl, sizeof(tbl)))
return IB_SUCCESS;
context.slvl_context.node_guid = osm_node_get_node_guid(p_node);
context.slvl_context.port_guid = osm_physp_get_port_guid(p);
context.slvl_context.set_method = TRUE;
attr_mod = in_port << 8 | out_port;
return osm_req_set(sm, osm_physp_get_dr_path_ptr(p),
(uint8_t *) & tbl, sizeof(tbl),
IB_MAD_ATTR_SLVL_TABLE,
cl_hton32(attr_mod), CL_DISP_MSGID_NONE, &context);
}
/*
* QoS primitives
*/
static ib_api_status_t vlarb_update_table_block(osm_sm_t * sm,
osm_physp_t * p,
uint8_t port_num,
unsigned force_update,
const ib_vl_arb_table_t *
table_block,
unsigned block_length,
unsigned block_num)
{
ib_vl_arb_table_t block;
osm_madw_context_t context;
uint32_t attr_mod;
unsigned vl_mask, i;
vl_mask = (1 << (ib_port_info_get_op_vls(&p->port_info) - 1)) - 1;
memset(&block, 0, sizeof(block));
memcpy(&block, table_block, block_length * sizeof(block.vl_entry[0]));
for (i = 0; i < block_length; i++)
block.vl_entry[i].vl &= vl_mask;
if (!force_update &&
!memcmp(&p->vl_arb[block_num], &block,
block_length * sizeof(block.vl_entry[0])))
return IB_SUCCESS;
context.vla_context.node_guid =
osm_node_get_node_guid(osm_physp_get_node_ptr(p));
context.vla_context.port_guid = osm_physp_get_port_guid(p);
context.vla_context.set_method = TRUE;
attr_mod = ((block_num + 1) << 16) | port_num;
return osm_req_set(sm, osm_physp_get_dr_path_ptr(p),
(uint8_t *) & block, sizeof(block),
IB_MAD_ATTR_VL_ARBITRATION,
cl_hton32(attr_mod), CL_DISP_MSGID_NONE, &context);
}
static ib_api_status_t sl2vl_update_table(osm_sm_t * sm, osm_physp_t * p,
uint8_t in_port, uint32_t attr_mod,
unsigned force_update,
const ib_slvl_table_t * sl2vl_table,
cl_qlist_t *mad_list)
{
ib_slvl_table_t tbl, *p_tbl;
unsigned vl_mask;
uint8_t vl1, vl2;
int i;
qos_mad_item_t *p_mad;
vl_mask = (1 << (ib_port_info_get_op_vls(&p->port_info) - 1)) - 1;
for (i = 0; i < IB_MAX_NUM_VLS / 2; i++) {
vl1 = sl2vl_table->raw_vl_by_sl[i] >> 4;
vl2 = sl2vl_table->raw_vl_by_sl[i] & 0xf;
if (vl1 != 15)
vl1 &= vl_mask;
if (vl2 != 15)
vl2 &= vl_mask;
tbl.raw_vl_by_sl[i] = (vl1 << 4) | vl2;
}
if (!force_update && (p_tbl = osm_physp_get_slvl_tbl(p, in_port)) &&
!memcmp(p_tbl, &tbl, sizeof(tbl)))
return IB_SUCCESS;
p_mad = osm_qos_mad_create(sm, p, sizeof(tbl), (uint8_t *) & tbl,
IB_MAD_ATTR_SLVL_TABLE, attr_mod);
if (!p_mad)
return IB_INSUFFICIENT_MEMORY;
cl_qlist_insert_tail(mad_list, &p_mad->list_item);
return IB_SUCCESS;
}
static boolean_t
__osm_link_mgr_set_physp_pi(osm_sm_t * sm,
IN osm_physp_t * const p_physp,
IN uint8_t const port_state)
{
uint8_t payload[IB_SMP_DATA_SIZE];
ib_port_info_t *const p_pi = (ib_port_info_t *) payload;
const ib_port_info_t *p_old_pi;
osm_madw_context_t context;
osm_node_t *p_node;
ib_api_status_t status;
uint8_t port_num;
uint8_t mtu;
uint8_t op_vls;
boolean_t esp0 = FALSE;
boolean_t send_set = FALSE;
osm_physp_t *p_remote_physp;
OSM_LOG_ENTER(sm->p_log);
p_node = osm_physp_get_node_ptr(p_physp);
port_num = osm_physp_get_port_num(p_physp);
if (port_num == 0) {
/*
CAs don't have a port 0, and for switch port 0,
we need to check if this is enhanced or base port 0.
For base port 0 the following parameters are not valid (p822, table 145).
*/
if (!p_node->sw) {
OSM_LOG(sm->p_log, OSM_LOG_ERROR, "ERR 4201: "
"Cannot find switch by guid: 0x%" PRIx64 "\n",
cl_ntoh64(p_node->node_info.node_guid));
goto Exit;
}
if (ib_switch_info_is_enhanced_port0(&p_node->sw->switch_info)
== FALSE) {
/* This means the switch doesn't support enhanced port 0.
Can skip it. */
OSM_LOG(sm->p_log, OSM_LOG_DEBUG,
"Skipping port 0, GUID 0x%016" PRIx64 "\n",
cl_ntoh64(osm_physp_get_port_guid(p_physp)));
goto Exit;
}
esp0 = TRUE;
}
/*
PAST THIS POINT WE ARE HANDLING EITHER A NON PORT 0 OR ENHANCED PORT 0
*/
p_old_pi = &p_physp->port_info;
memset(payload, 0, IB_SMP_DATA_SIZE);
memcpy(payload, p_old_pi, sizeof(ib_port_info_t));
/*
Should never write back a value that is bigger then 3 in
the PortPhysicalState field - so can not simply copy!
Actually we want to write there:
port physical state - no change,
link down default state = polling
port state - as requested.
*/
p_pi->state_info2 = 0x02;
ib_port_info_set_port_state(p_pi, port_state);
if (ib_port_info_get_link_down_def_state(p_pi) !=
ib_port_info_get_link_down_def_state(p_old_pi))
send_set = TRUE;
/* didn't get PortInfo before */
if (!ib_port_info_get_port_state(p_old_pi))
send_set = TRUE;
/* we only change port fields if we do not change state */
if (port_state == IB_LINK_NO_CHANGE) {
/* The following fields are relevant only for CA port, router, or Enh. SP0 */
if (osm_node_get_type(p_node) != IB_NODE_TYPE_SWITCH ||
port_num == 0) {
p_pi->m_key = sm->p_subn->opt.m_key;
if (memcmp(&p_pi->m_key, &p_old_pi->m_key,
sizeof(p_pi->m_key)))
send_set = TRUE;
p_pi->subnet_prefix = sm->p_subn->opt.subnet_prefix;
if (memcmp(&p_pi->subnet_prefix,
&p_old_pi->subnet_prefix,
sizeof(p_pi->subnet_prefix)))
send_set = TRUE;
p_pi->base_lid = osm_physp_get_base_lid(p_physp);
if (memcmp(&p_pi->base_lid, &p_old_pi->base_lid,
sizeof(p_pi->base_lid)))
send_set = TRUE;
/* we are initializing the ports with our local sm_base_lid */
p_pi->master_sm_base_lid = sm->p_subn->sm_base_lid;
if (memcmp(&p_pi->master_sm_base_lid,
&p_old_pi->master_sm_base_lid,
sizeof(p_pi->master_sm_base_lid)))
send_set = TRUE;
p_pi->m_key_lease_period =
sm->p_subn->opt.m_key_lease_period;
if (memcmp(&p_pi->m_key_lease_period,
&p_old_pi->m_key_lease_period,
sizeof(p_pi->m_key_lease_period)))
send_set = TRUE;
if (esp0 == FALSE)
p_pi->mkey_lmc = sm->p_subn->opt.lmc;
else {
if (sm->p_subn->opt.lmc_esp0)
p_pi->mkey_lmc = sm->p_subn->opt.lmc;
else
p_pi->mkey_lmc = 0;
}
if (memcmp(&p_pi->mkey_lmc, &p_old_pi->mkey_lmc,
sizeof(p_pi->mkey_lmc)))
send_set = TRUE;
ib_port_info_set_timeout(p_pi,
sm->p_subn->opt.
subnet_timeout);
if (ib_port_info_get_timeout(p_pi) !=
ib_port_info_get_timeout(p_old_pi))
send_set = TRUE;
}
/*
Several timeout mechanisms:
*/
p_remote_physp = osm_physp_get_remote(p_physp);
if (port_num != 0 && p_remote_physp) {
if (osm_node_get_type(osm_physp_get_node_ptr(p_physp))
== IB_NODE_TYPE_ROUTER) {
ib_port_info_set_hoq_lifetime(p_pi,
sm->p_subn->
opt.
leaf_head_of_queue_lifetime);
} else
if (osm_node_get_type
(osm_physp_get_node_ptr(p_physp)) ==
IB_NODE_TYPE_SWITCH) {
/* Is remote end CA or router (a leaf port) ? */
if (osm_node_get_type
(osm_physp_get_node_ptr(p_remote_physp)) !=
IB_NODE_TYPE_SWITCH) {
ib_port_info_set_hoq_lifetime(p_pi,
sm->
p_subn->
opt.
leaf_head_of_queue_lifetime);
ib_port_info_set_vl_stall_count(p_pi,
sm->
p_subn->
opt.
leaf_vl_stall_count);
} else {
ib_port_info_set_hoq_lifetime(p_pi,
sm->
p_subn->
opt.
head_of_queue_lifetime);
ib_port_info_set_vl_stall_count(p_pi,
sm->
p_subn->
opt.
vl_stall_count);
}
}
if (ib_port_info_get_hoq_lifetime(p_pi) !=
ib_port_info_get_hoq_lifetime(p_old_pi) ||
ib_port_info_get_vl_stall_count(p_pi) !=
ib_port_info_get_vl_stall_count(p_old_pi))
send_set = TRUE;
}
ib_port_info_set_phy_and_overrun_err_thd(p_pi,
sm->p_subn->opt.
local_phy_errors_threshold,
sm->p_subn->opt.
overrun_errors_threshold);
if (memcmp(&p_pi->error_threshold, &p_old_pi->error_threshold,
sizeof(p_pi->error_threshold)))
send_set = TRUE;
/*
Set the easy common parameters for all port types,
then determine the neighbor MTU.
*/
p_pi->link_width_enabled = p_old_pi->link_width_supported;
if (memcmp(&p_pi->link_width_enabled,
&p_old_pi->link_width_enabled,
sizeof(p_pi->link_width_enabled)))
send_set = TRUE;
if (sm->p_subn->opt.force_link_speed &&
(sm->p_subn->opt.force_link_speed != 15 ||
ib_port_info_get_link_speed_enabled(p_pi) !=
ib_port_info_get_link_speed_sup(p_pi))) {
ib_port_info_set_link_speed_enabled(p_pi,
sm->p_subn->opt.
force_link_speed);
if (memcmp(&p_pi->link_speed, &p_old_pi->link_speed,
sizeof(p_pi->link_speed)))
send_set = TRUE;
}
/* calc new op_vls and mtu */
op_vls =
osm_physp_calc_link_op_vls(sm->p_log, sm->p_subn, p_physp);
mtu = osm_physp_calc_link_mtu(sm->p_log, p_physp);
ib_port_info_set_neighbor_mtu(p_pi, mtu);
if (ib_port_info_get_neighbor_mtu(p_pi) !=
ib_port_info_get_neighbor_mtu(p_old_pi))
send_set = TRUE;
ib_port_info_set_op_vls(p_pi, op_vls);
if (ib_port_info_get_op_vls(p_pi) !=
ib_port_info_get_op_vls(p_old_pi))
send_set = TRUE;
/* provide the vl_high_limit from the qos mgr */
if (sm->p_subn->opt.qos &&
p_physp->vl_high_limit != p_old_pi->vl_high_limit) {
send_set = TRUE;
p_pi->vl_high_limit = p_physp->vl_high_limit;
}
}
if (port_state != IB_LINK_NO_CHANGE &&
port_state != ib_port_info_get_port_state(p_old_pi)) {
send_set = TRUE;
if (port_state == IB_LINK_ACTIVE)
context.pi_context.active_transition = TRUE;
else
context.pi_context.active_transition = FALSE;
}
context.pi_context.node_guid = osm_node_get_node_guid(p_node);
context.pi_context.port_guid = osm_physp_get_port_guid(p_physp);
context.pi_context.set_method = TRUE;
context.pi_context.light_sweep = FALSE;
/* We need to send the PortInfoSet request with the new sm_lid
in the following cases:
1. There is a change in the values (send_set == TRUE)
2. This is a switch external port (so it wasn't handled yet by
osm_lid_mgr) and first_time_master_sweep flag on the subnet is TRUE,
which means the SM just became master, and it then needs to send at
PortInfoSet to every port.
*/
if (osm_node_get_type(p_node) == IB_NODE_TYPE_SWITCH && port_num
&& sm->p_subn->first_time_master_sweep == TRUE)
send_set = TRUE;
if (send_set)
status = osm_req_set(sm, osm_physp_get_dr_path_ptr(p_physp),
payload, sizeof(payload),
IB_MAD_ATTR_PORT_INFO,
cl_hton32(port_num),
CL_DISP_MSGID_NONE, &context);
Exit:
OSM_LOG_EXIT(sm->p_log);
return send_set;
}
static int link_mgr_set_physp_pi(osm_sm_t * sm, IN osm_physp_t * p_physp,
IN uint8_t port_state)
{
uint8_t payload[IB_SMP_DATA_SIZE], payload2[IB_SMP_DATA_SIZE];
ib_port_info_t *p_pi = (ib_port_info_t *) payload;
ib_mlnx_ext_port_info_t *p_epi = (ib_mlnx_ext_port_info_t *) payload2;
const ib_port_info_t *p_old_pi;
const ib_mlnx_ext_port_info_t *p_old_epi;
osm_madw_context_t context;
osm_node_t *p_node;
ib_api_status_t status;
uint8_t port_num, mtu, op_vls, smsl = OSM_DEFAULT_SL;
boolean_t esp0 = FALSE, send_set = FALSE, send_set2 = FALSE;
osm_physp_t *p_remote_physp, *physp0;
int qdr_change = 0, fdr10_change = 0;
int ret = 0;
ib_net32_t attr_mod, cap_mask;
OSM_LOG_ENTER(sm->p_log);
p_node = osm_physp_get_node_ptr(p_physp);
p_old_pi = &p_physp->port_info;
port_num = osm_physp_get_port_num(p_physp);
if (port_num == 0) {
/*
CAs don't have a port 0, and for switch port 0,
we need to check if this is enhanced or base port 0.
For base port 0 the following parameters are not valid
(IBA 1.2.1 p.830 table 146).
*/
if (!p_node->sw) {
OSM_LOG(sm->p_log, OSM_LOG_ERROR, "ERR 4201: "
"Cannot find switch by guid: 0x%" PRIx64 "\n",
cl_ntoh64(p_node->node_info.node_guid));
goto Exit;
}
if (ib_switch_info_is_enhanced_port0(&p_node->sw->switch_info)
== FALSE) {
/* Even for base port 0 we might have to set smsl
(if we are using lash routing) */
smsl = link_mgr_get_smsl(sm, p_physp);
if (smsl != ib_port_info_get_master_smsl(p_old_pi)) {
send_set = TRUE;
OSM_LOG(sm->p_log, OSM_LOG_DEBUG,
"Setting SMSL to %d on port 0 GUID 0x%016"
PRIx64 "\n", smsl,
cl_ntoh64(osm_physp_get_port_guid
(p_physp)));
} else {
/* This means the switch doesn't support
enhanced port 0 and we don't need to
change SMSL. Can skip it. */
OSM_LOG(sm->p_log, OSM_LOG_DEBUG,
"Skipping port 0, GUID 0x%016" PRIx64
"\n",
cl_ntoh64(osm_physp_get_port_guid
(p_physp)));
goto Exit;
}
} else
esp0 = TRUE;
}
memcpy(payload, p_old_pi, sizeof(ib_port_info_t));
/*
Should never write back a value that is bigger then 3 in
the PortPhysicalState field - so can not simply copy!
Actually we want to write there:
port physical state - no change,
link down default state = polling
port state - as requested.
*/
p_pi->state_info2 = 0x02;
ib_port_info_set_port_state(p_pi, port_state);
/* Check whether this is base port0 smsl handling only */
if (port_num == 0 && esp0 == FALSE) {
ib_port_info_set_master_smsl(p_pi, smsl);
goto Send;
}
/*
PAST THIS POINT WE ARE HANDLING EITHER A NON PORT 0 OR ENHANCED PORT 0
*/
if (ib_port_info_get_link_down_def_state(p_pi) !=
ib_port_info_get_link_down_def_state(p_old_pi))
send_set = TRUE;
/* didn't get PortInfo before */
if (!ib_port_info_get_port_state(p_old_pi))
send_set = TRUE;
/* we only change port fields if we do not change state */
if (port_state == IB_LINK_NO_CHANGE) {
/* The following fields are relevant only for CA port, router, or Enh. SP0 */
if (osm_node_get_type(p_node) != IB_NODE_TYPE_SWITCH ||
port_num == 0) {
p_pi->m_key = sm->p_subn->opt.m_key;
if (memcmp(&p_pi->m_key, &p_old_pi->m_key,
sizeof(p_pi->m_key)))
send_set = TRUE;
p_pi->subnet_prefix = sm->p_subn->opt.subnet_prefix;
if (memcmp(&p_pi->subnet_prefix,
&p_old_pi->subnet_prefix,
sizeof(p_pi->subnet_prefix)))
send_set = TRUE;
p_pi->base_lid = osm_physp_get_base_lid(p_physp);
if (memcmp(&p_pi->base_lid, &p_old_pi->base_lid,
sizeof(p_pi->base_lid)))
send_set = TRUE;
/* we are initializing the ports with our local sm_base_lid */
p_pi->master_sm_base_lid = sm->p_subn->sm_base_lid;
if (memcmp(&p_pi->master_sm_base_lid,
&p_old_pi->master_sm_base_lid,
sizeof(p_pi->master_sm_base_lid)))
send_set = TRUE;
smsl = link_mgr_get_smsl(sm, p_physp);
if (smsl != ib_port_info_get_master_smsl(p_old_pi)) {
ib_port_info_set_master_smsl(p_pi, smsl);
OSM_LOG(sm->p_log, OSM_LOG_DEBUG,
"Setting SMSL to %d on GUID 0x%016"
PRIx64 ", port %d\n", smsl,
cl_ntoh64(osm_physp_get_port_guid
(p_physp)), port_num);
send_set = TRUE;
}
p_pi->m_key_lease_period =
sm->p_subn->opt.m_key_lease_period;
if (memcmp(&p_pi->m_key_lease_period,
&p_old_pi->m_key_lease_period,
sizeof(p_pi->m_key_lease_period)))
send_set = TRUE;
/* M_KeyProtectBits are currently always zero */
p_pi->mkey_lmc = 0;
if (esp0 == FALSE || sm->p_subn->opt.lmc_esp0)
ib_port_info_set_lmc(p_pi, sm->p_subn->opt.lmc);
if (ib_port_info_get_lmc(p_old_pi) !=
ib_port_info_get_lmc(p_pi) ||
ib_port_info_get_mpb(p_old_pi) !=
ib_port_info_get_mpb(p_pi))
send_set = TRUE;
ib_port_info_set_timeout(p_pi,
sm->p_subn->opt.
subnet_timeout);
if (ib_port_info_get_timeout(p_pi) !=
ib_port_info_get_timeout(p_old_pi))
send_set = TRUE;
}
/*
Several timeout mechanisms:
*/
p_remote_physp = osm_physp_get_remote(p_physp);
if (port_num != 0 && p_remote_physp) {
if (osm_node_get_type(osm_physp_get_node_ptr(p_physp))
== IB_NODE_TYPE_ROUTER) {
ib_port_info_set_hoq_lifetime(p_pi,
sm->p_subn->
opt.
leaf_head_of_queue_lifetime);
} else
if (osm_node_get_type
(osm_physp_get_node_ptr(p_physp)) ==
IB_NODE_TYPE_SWITCH) {
/* Is remote end CA or router (a leaf port) ? */
if (osm_node_get_type
(osm_physp_get_node_ptr(p_remote_physp)) !=
IB_NODE_TYPE_SWITCH) {
ib_port_info_set_hoq_lifetime(p_pi,
sm->
p_subn->
opt.
leaf_head_of_queue_lifetime);
ib_port_info_set_vl_stall_count(p_pi,
sm->
p_subn->
opt.
leaf_vl_stall_count);
} else {
ib_port_info_set_hoq_lifetime(p_pi,
sm->
p_subn->
opt.
head_of_queue_lifetime);
ib_port_info_set_vl_stall_count(p_pi,
sm->
p_subn->
opt.
vl_stall_count);
}
}
if (ib_port_info_get_hoq_lifetime(p_pi) !=
ib_port_info_get_hoq_lifetime(p_old_pi) ||
ib_port_info_get_vl_stall_count(p_pi) !=
ib_port_info_get_vl_stall_count(p_old_pi))
send_set = TRUE;
}
ib_port_info_set_phy_and_overrun_err_thd(p_pi,
sm->p_subn->opt.
local_phy_errors_threshold,
sm->p_subn->opt.
overrun_errors_threshold);
if (memcmp(&p_pi->error_threshold, &p_old_pi->error_threshold,
sizeof(p_pi->error_threshold)))
send_set = TRUE;
/*
Set the easy common parameters for all port types,
then determine the neighbor MTU.
*/
p_pi->link_width_enabled = p_old_pi->link_width_supported;
if (memcmp(&p_pi->link_width_enabled,
&p_old_pi->link_width_enabled,
sizeof(p_pi->link_width_enabled)))
send_set = TRUE;
if (sm->p_subn->opt.force_link_speed &&
(sm->p_subn->opt.force_link_speed != 15 ||
ib_port_info_get_link_speed_enabled(p_pi) !=
ib_port_info_get_link_speed_sup(p_pi))) {
ib_port_info_set_link_speed_enabled(p_pi,
sm->p_subn->opt.
force_link_speed);
if (memcmp(&p_pi->link_speed, &p_old_pi->link_speed,
sizeof(p_pi->link_speed))) {
send_set = TRUE;
/* Determine whether QDR in LSE is being changed */
if ((ib_port_info_get_link_speed_enabled(p_pi) &
IB_LINK_SPEED_ACTIVE_10 &&
!(ib_port_info_get_link_speed_enabled(p_old_pi) &
IB_LINK_SPEED_ACTIVE_10)) ||
((!(ib_port_info_get_link_speed_enabled(p_pi) &
IB_LINK_SPEED_ACTIVE_10) &&
ib_port_info_get_link_speed_enabled(p_old_pi) &
IB_LINK_SPEED_ACTIVE_10)))
qdr_change = 1;
}
}
if (sm->p_subn->opt.fdr10 &&
p_physp->ext_port_info.link_speed_supported & FDR10) {
if (sm->p_subn->opt.fdr10 == 1) { /* enable */
if (!(p_physp->ext_port_info.link_speed_enabled & FDR10))
fdr10_change = 1;
} else { /* disable */
if (p_physp->ext_port_info.link_speed_enabled & FDR10)
fdr10_change = 1;
}
if (fdr10_change) {
p_old_epi = &p_physp->ext_port_info;
memcpy(payload2, p_old_epi,
sizeof(ib_mlnx_ext_port_info_t));
p_epi->state_change_enable = 0x01;
if (sm->p_subn->opt.fdr10 == 1)
p_epi->link_speed_enabled = FDR10;
else
p_epi->link_speed_enabled = 0;
send_set2 = TRUE;
}
}
if (osm_node_get_type(p_physp->p_node) == IB_NODE_TYPE_SWITCH) {
physp0 = osm_node_get_physp_ptr(p_physp->p_node, 0);
cap_mask = physp0->port_info.capability_mask;
} else
cap_mask = p_pi->capability_mask;
if (!(cap_mask & IB_PORT_CAP_HAS_EXT_SPEEDS))
qdr_change = 0;
/* Do peer ports support extended link speeds ? */
if (port_num != 0 && p_remote_physp) {
osm_physp_t *rphysp0;
ib_net32_t rem_cap_mask;
if (osm_node_get_type(p_remote_physp->p_node) ==
IB_NODE_TYPE_SWITCH) {
rphysp0 = osm_node_get_physp_ptr(p_remote_physp->p_node, 0);
rem_cap_mask = rphysp0->port_info.capability_mask;
} else
rem_cap_mask = p_remote_physp->port_info.capability_mask;
if (cap_mask & IB_PORT_CAP_HAS_EXT_SPEEDS &&
rem_cap_mask & IB_PORT_CAP_HAS_EXT_SPEEDS) {
if (sm->p_subn->opt.force_link_speed_ext &&
(sm->p_subn->opt.force_link_speed_ext != IB_LINK_SPEED_EXT_SET_LSES ||
p_pi->link_speed_ext_enabled !=
ib_port_info_get_link_speed_sup(p_pi))) {
p_pi->link_speed_ext_enabled = sm->p_subn->opt.force_link_speed_ext;
if (memcmp(&p_pi->link_speed_ext_enabled,
&p_old_pi->link_speed_ext_enabled,
sizeof(p_pi->link_speed_ext_enabled)))
send_set = TRUE;
}
}
}
/* calc new op_vls and mtu */
op_vls =
osm_physp_calc_link_op_vls(sm->p_log, sm->p_subn, p_physp);
mtu = osm_physp_calc_link_mtu(sm->p_log, p_physp);
ib_port_info_set_neighbor_mtu(p_pi, mtu);
if (ib_port_info_get_neighbor_mtu(p_pi) !=
ib_port_info_get_neighbor_mtu(p_old_pi))
send_set = TRUE;
ib_port_info_set_op_vls(p_pi, op_vls);
if (ib_port_info_get_op_vls(p_pi) !=
ib_port_info_get_op_vls(p_old_pi))
send_set = TRUE;
/* provide the vl_high_limit from the qos mgr */
if (sm->p_subn->opt.qos &&
p_physp->vl_high_limit != p_old_pi->vl_high_limit) {
send_set = TRUE;
p_pi->vl_high_limit = p_physp->vl_high_limit;
}
}
Send:
if (port_state != IB_LINK_NO_CHANGE &&
port_state != ib_port_info_get_port_state(p_old_pi)) {
send_set = TRUE;
if (port_state == IB_LINK_ACTIVE)
context.pi_context.active_transition = TRUE;
else
context.pi_context.active_transition = FALSE;
}
context.pi_context.node_guid = osm_node_get_node_guid(p_node);
context.pi_context.port_guid = osm_physp_get_port_guid(p_physp);
context.pi_context.set_method = TRUE;
context.pi_context.light_sweep = FALSE;
/* We need to send the PortInfoSet request with the new sm_lid
in the following cases:
1. There is a change in the values (send_set == TRUE)
2. This is a switch external port (so it wasn't handled yet by
osm_lid_mgr) and first_time_master_sweep flag on the subnet is TRUE,
which means the SM just became master, and it then needs to send at
PortInfoSet to every port.
*/
if (osm_node_get_type(p_node) == IB_NODE_TYPE_SWITCH && port_num
&& sm->p_subn->first_time_master_sweep == TRUE)
send_set = TRUE;
if (!send_set)
goto Exit;
attr_mod = cl_hton32(port_num);
if (qdr_change)
attr_mod |= cl_hton32(1 << 31); /* AM SMSupportExtendedSpeeds */
status = osm_req_set(sm, osm_physp_get_dr_path_ptr(p_physp),
payload, sizeof(payload), IB_MAD_ATTR_PORT_INFO,
attr_mod, CL_DISP_MSGID_NONE, &context);
if (status)
ret = -1;
if (send_set2) {
status = osm_req_set(sm, osm_physp_get_dr_path_ptr(p_physp),
payload2, sizeof(payload2),
IB_MAD_ATTR_MLNX_EXTENDED_PORT_INFO,
cl_hton32(port_num),
CL_DISP_MSGID_NONE, &context);
if (status)
ret = -1;
}
Exit:
OSM_LOG_EXIT(sm->p_log);
return ret;
}
static int qos_extports_setup(osm_sm_t * sm, osm_node_t *node,
const struct qos_config *qcfg,
cl_qlist_t *port_mad_list)
{
osm_physp_t *p0, *p;
unsigned force_update;
unsigned num_ports = osm_node_get_num_physp(node);
struct osm_routing_engine *re = sm->p_subn->p_osm->routing_engine_used;
int ret = 0;
unsigned in, out;
uint8_t op_vl, common_op_vl = 0, max_num = 0;
uint8_t op_vl_arr[15];
/*
* Do nothing unless the most recent routing attempt was successful.
*/
if (!re)
return ret;
for (out = 1; out < num_ports; out++) {
p = osm_node_get_physp_ptr(node, out);
if (ib_port_info_get_port_state(&p->port_info) == IB_LINK_DOWN)
continue;
force_update = p->need_update || sm->p_subn->need_update;
p->vl_high_limit = qcfg->vl_high_limit;
if (vlarb_update(sm, p, p->port_num, force_update, qcfg,
port_mad_list))
ret = -1;
}
p0 = osm_node_get_physp_ptr(node, 0);
if (!(p0->port_info.capability_mask & IB_PORT_CAP_HAS_SL_MAP))
return ret;
if (ib_switch_info_get_opt_sl2vlmapping(&node->sw->switch_info) &&
sm->p_subn->opt.use_optimized_slvl && !re->update_sl2vl) {
/* we should find the op_vl that is used by majority of ports */
memset(&op_vl_arr[0], 0, sizeof(op_vl_arr));
p0 = osm_node_get_physp_ptr(node, 1);
for (out = 1; out < num_ports; out++) {
p = osm_node_get_physp_ptr(node, out);
if (ib_port_info_get_port_state(&p->port_info) ==
IB_LINK_DOWN)
continue;
op_vl = ib_port_info_get_op_vls(&p->port_info);
op_vl_arr[op_vl]++;
if (op_vl_arr[op_vl] > max_num){
max_num = op_vl_arr[op_vl];
common_op_vl = op_vl;
/* remember the port with most common op_vl */
p0 = p;
}
}
force_update = node->sw->need_update || sm->p_subn->need_update;
if (sl2vl_update_table(sm, p0, p0->port_num, 0x30000, force_update,
&qcfg->sl2vl, port_mad_list))
ret = -1;
/*
* Overwrite default ALL configuration if port's
* op_vl is different.
*/
for (out = 1; out < num_ports; out++) {
p = osm_node_get_physp_ptr(node, out);
if (ib_port_info_get_port_state(&p->port_info) ==
IB_LINK_DOWN)
continue;
force_update = p->need_update || force_update;
if (ib_port_info_get_op_vls(&p->port_info) !=
common_op_vl &&
sl2vl_update_table(sm, p, p->port_num, 0x20000 | out,
force_update, &qcfg->sl2vl,
port_mad_list))
ret = -1;
}
return ret;
}
/* non optimized sl2vl configuration */
out = ib_switch_info_is_enhanced_port0(&node->sw->switch_info) ? 0 : 1;
for (; out < num_ports; out++) {
p = osm_node_get_physp_ptr(node, out);
if (ib_port_info_get_port_state(&p->port_info) == IB_LINK_DOWN)
continue;
force_update = p->need_update || sm->p_subn->need_update;
/* go over all in ports */
for (in = 0; in < num_ports; in++) {
const ib_slvl_table_t *port_sl2vl = &qcfg->sl2vl;
ib_slvl_table_t routing_sl2vl;
if (re->update_sl2vl) {
routing_sl2vl = *port_sl2vl;
re->update_sl2vl(re->context,
p, in, out, &routing_sl2vl);
port_sl2vl = &routing_sl2vl;
}
if (sl2vl_update_table(sm, p, in, in << 8 | out,
force_update, port_sl2vl,
port_mad_list))
ret = -1;
}
}
return ret;
}
static int discover_network_properties(lash_t * p_lash)
{
int i, id = 0;
uint8_t vl_min;
osm_subn_t *p_subn = &p_lash->p_osm->subn;
osm_switch_t *p_next_sw, *p_sw;
osm_log_t *p_log = &p_lash->p_osm->log;
p_lash->num_switches = cl_qmap_count(&p_subn->sw_guid_tbl);
p_lash->switches = calloc(p_lash->num_switches, sizeof(switch_t *));
if (!p_lash->switches)
return -1;
vl_min = 5; /* set to a high value */
p_next_sw = (osm_switch_t *) cl_qmap_head(&p_subn->sw_guid_tbl);
while (p_next_sw != (osm_switch_t *) cl_qmap_end(&p_subn->sw_guid_tbl)) {
uint16_t port_count;
p_sw = p_next_sw;
p_next_sw = (osm_switch_t *) cl_qmap_next(&p_sw->map_item);
p_lash->switches[id] = switch_create(p_lash, id, p_sw);
if (!p_lash->switches[id])
return -1;
id++;
port_count = osm_node_get_num_physp(p_sw->p_node);
/* Note, ignoring port 0. management port */
for (i = 1; i < port_count; i++) {
osm_physp_t *p_current_physp =
osm_node_get_physp_ptr(p_sw->p_node, i);
if (p_current_physp
&& p_current_physp->p_remote_physp) {
ib_port_info_t *p_port_info =
&p_current_physp->port_info;
uint8_t port_vl_min =
ib_port_info_get_op_vls(p_port_info);
if (port_vl_min && port_vl_min < vl_min)
vl_min = port_vl_min;
}
} /* for */
} /* while */
vl_min = 1 << (vl_min - 1);
if (vl_min > 15)
vl_min = 15;
if (p_lash->p_osm->subn.opt.lash_start_vl >= vl_min) {
OSM_LOG(p_log, OSM_LOG_ERROR, "ERR 4D03: "
"Start VL(%d) too high for min operational vl(%d)\n",
p_lash->p_osm->subn.opt.lash_start_vl, vl_min);
return -1;
}
p_lash->vl_min = vl_min - p_lash->p_osm->subn.opt.lash_start_vl;
OSM_LOG(p_log, OSM_LOG_INFO,
"min operational vl(%d) start vl(%d) max_switches(%d)\n",
p_lash->vl_min, p_lash->p_osm->subn.opt.lash_start_vl,
p_lash->num_switches);
return 0;
}
