C++ (Cpp) icu2_write Examples

Example #1

File: icu.c Project: Voskrese/mipsonqemu

static inline uint16_t icu2_clear(uint8_t offset, uint16_t clear)
{
	uint16_t data;

	data = icu2_read(offset);
	data &= ~clear;
	icu2_write(offset, data);

	return data;
}

Example #2

File: icu.c Project: Voskrese/mipsonqemu

static inline uint16_t icu2_set(uint8_t offset, uint16_t set)
{
	uint16_t data;

	data = icu2_read(offset);
	data |= set;
	icu2_write(offset, data);

	return data;
}

Example #3

File: icu.c Project: Voskrese/mipsonqemu

void vr41xx_disable_bcuint(void)
{
	struct irq_desc *desc = irq_desc + BCU_IRQ;
	unsigned long flags;

	if (current_cpu_data.cputype == CPU_VR4122 ||
	    current_cpu_data.cputype == CPU_VR4131 ||
	    current_cpu_data.cputype == CPU_VR4133) {
		spin_lock_irqsave(&desc->lock, flags);
		icu2_write(MBCUINTREG, 0);
		spin_unlock_irqrestore(&desc->lock, flags);
	}
}

Example #4

File: icu.c Project: Voskrese/mipsonqemu

void vr41xx_enable_pciint(void)
{
	struct irq_desc *desc = irq_desc + PCI_IRQ;
	unsigned long flags;

	if (current_cpu_data.cputype == CPU_VR4122 ||
	    current_cpu_data.cputype == CPU_VR4131 ||
	    current_cpu_data.cputype == CPU_VR4133) {
		spin_lock_irqsave(&desc->lock, flags);
		icu2_write(MPCIINTREG, PCIINT0);
		spin_unlock_irqrestore(&desc->lock, flags);
	}
}

Example #5

File: icu.c Project: 274914765/C

void vr41xx_enable_scuint(void)
{
    struct irq_desc *desc = irq_desc + SCU_IRQ;
    unsigned long flags;

    if (current_cpu_type() == CPU_VR4122 ||
        current_cpu_type() == CPU_VR4131 ||
        current_cpu_type() == CPU_VR4133) {
        spin_lock_irqsave(&desc->lock, flags);
        icu2_write(MSCUINTREG, SCUINT0);
        spin_unlock_irqrestore(&desc->lock, flags);
    }
}

Example #6

File: icu.c Project: 007kumarraja/rockchip-rk3188-mk908

void vr41xx_enable_bcuint(void)
{
	struct irq_desc *desc = irq_to_desc(BCU_IRQ);
	unsigned long flags;

	if (current_cpu_type() == CPU_VR4122 ||
	    current_cpu_type() == CPU_VR4131 ||
	    current_cpu_type() == CPU_VR4133) {
		raw_spin_lock_irqsave(&desc->lock, flags);
		icu2_write(MBCUINTREG, BCUINTR);
		raw_spin_unlock_irqrestore(&desc->lock, flags);
	}
}

Example #7

File: icu.c Project: 007kumarraja/rockchip-rk3188-mk908

void vr41xx_disable_pciint(void)
{
	struct irq_desc *desc = irq_to_desc(PCI_IRQ);
	unsigned long flags;

	if (current_cpu_type() == CPU_VR4122 ||
	    current_cpu_type() == CPU_VR4131 ||
	    current_cpu_type() == CPU_VR4133) {
		raw_spin_lock_irqsave(&desc->lock, flags);
		icu2_write(MPCIINTREG, 0);
		raw_spin_unlock_irqrestore(&desc->lock, flags);
	}
}

Example #8

File: icu.c Project: Voskrese/mipsonqemu

static int __init vr41xx_icu_init(void)
{
	unsigned long icu1_start, icu2_start;
	int i;

	switch (current_cpu_data.cputype) {
	case CPU_VR4111:
	case CPU_VR4121:
		icu1_start = ICU1_TYPE1_BASE;
		icu2_start = ICU2_TYPE1_BASE;
		break;
	case CPU_VR4122:
	case CPU_VR4131:
	case CPU_VR4133:
		icu1_start = ICU1_TYPE2_BASE;
		icu2_start = ICU2_TYPE2_BASE;
		break;
	default:
		printk(KERN_ERR "ICU: Unexpected CPU of NEC VR4100 series\n");
		return -ENODEV;
	}

	if (request_mem_region(icu1_start, ICU1_SIZE, "ICU") == NULL)
		return -EBUSY;

	if (request_mem_region(icu2_start, ICU2_SIZE, "ICU") == NULL) {
		release_mem_region(icu1_start, ICU1_SIZE);
		return -EBUSY;
	}

	icu1_base = ioremap(icu1_start, ICU1_SIZE);
	if (icu1_base == NULL) {
		release_mem_region(icu1_start, ICU1_SIZE);
		release_mem_region(icu2_start, ICU2_SIZE);
		return -ENOMEM;
	}

	icu2_base = ioremap(icu2_start, ICU2_SIZE);
	if (icu2_base == NULL) {
		iounmap(icu1_base);
		release_mem_region(icu1_start, ICU1_SIZE);
		release_mem_region(icu2_start, ICU2_SIZE);
		return -ENOMEM;
	}

	icu1_write(MSYSINT1REG, 0);
	icu1_write(MGIUINTLREG, 0xffff);

	icu2_write(MSYSINT2REG, 0);
	icu2_write(MGIUINTHREG, 0xffff);

	for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
		irq_desc[i].chip = &sysint1_irq_type;

	for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
		irq_desc[i].chip = &sysint2_irq_type;

	cascade_irq(INT0_IRQ, icu_get_irq);
	cascade_irq(INT1_IRQ, icu_get_irq);
	cascade_irq(INT2_IRQ, icu_get_irq);
	cascade_irq(INT3_IRQ, icu_get_irq);
	cascade_irq(INT4_IRQ, icu_get_irq);

	return 0;
}