void piix_write(int func, int addr, uint8_t val, void *priv)
{
// pclog("piix_write: func=%d addr=%02x val=%02x %04x:%08x\n", func, addr, val, CS, pc);
if (func > 1)
return;
if (func == 1) /*IDE*/
{
switch (addr)
{
case 0x04:
card_piix_ide[0x04] = (card_piix_ide[0x04] & ~5) | (val & 5);
break;
case 0x07:
card_piix_ide[0x07] = (card_piix_ide[0x07] & ~0x38) | (val & 0x38);
break;
case 0x0d:
card_piix_ide[0x0d] = val;
break;
case 0x20:
card_piix_ide[0x20] = (val & ~0x0f) | 1;
break;
case 0x21:
card_piix_ide[0x21] = val;
break;
case 0x40:
card_piix_ide[0x40] = val;
break;
case 0x41:
if ((val ^ card_piix_ide[0x41]) & 0x80)
{
ide_pri_disable();
if (val & 0x80)
ide_pri_enable();
}
card_piix_ide[0x41] = val;
break;
case 0x42:
card_piix_ide[0x42] = val;
break;
case 0x43:
if ((val ^ card_piix_ide[0x43]) & 0x80)
{
ide_sec_disable();
if (val & 0x80)
ide_sec_enable();
}
card_piix_ide[0x43] = val;
break;
}
if (addr == 4 || (addr & ~3) == 0x20) /*Bus master base address*/
{
uint16_t base = (card_piix_ide[0x20] & 0xf0) | (card_piix_ide[0x21] << 8);
io_removehandler(0, 0x10000, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
if (card_piix_ide[0x04] & 1)
io_sethandler(base, 0x10, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
}
// pclog("PIIX write %02X %02X\n", addr, val);
}
else
{
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0e:
return;
}
card_piix[addr] = val;
}
}
void piix_write(int func, int addr, uint8_t val, void *priv)
{
// pclog("piix_write: func=%d addr=%02x val=%02x %04x:%08x\n", func, addr, val, CS, pc);
if (func > 1)
return;
if (func == 1) /*IDE*/
{
switch (addr)
{
case 0x04:
// pclog("IDE on/off\n");
if (romset == ROM_P55T2P4) resetide();
card_piix_ide[0x04] = (card_piix_ide[0x04] & ~5) | (val & 5);
break;
case 0x07:
card_piix_ide[0x07] = (card_piix_ide[0x07] & ~0x38) | (val & 0x38);
break;
case 0x0d:
card_piix_ide[0x0d] = val;
break;
case 0x20:
card_piix_ide[0x20] = (val & ~0x0f) | 1;
break;
case 0x21:
card_piix_ide[0x21] = val;
break;
#if 0
case 0x33:
/* Note by OBattler: This is a hack, but it's needed to reset the cylinders of the IDE devices. */
if (romset != ROM_P55T2P4) break;
if (val != piix_33)
{
resetide();
}
piix_33 = val;
break;
#endif
case 0x40:
card_piix_ide[0x40] = val;
break;
case 0x41:
if ((val ^ card_piix_ide[0x41]) & 0x80)
{
ide_pri_disable();
if (val & 0x80)
ide_pri_enable();
}
card_piix_ide[0x41] = val;
break;
case 0x42:
card_piix_ide[0x42] = val;
break;
case 0x43:
if ((val ^ card_piix_ide[0x43]) & 0x80)
{
ide_sec_disable();
if (val & 0x80)
ide_sec_enable();
}
card_piix_ide[0x43] = val;
break;
case 0x44:
if (piix_type >= 3) card_piix_ide[0x44] = val;
break;
}
if (addr == 4 || (addr & ~3) == 0x20) /*Bus master base address*/
{
uint16_t base = (card_piix_ide[0x20] & 0xf0) | (card_piix_ide[0x21] << 8);
io_removehandler(0, 0x10000, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
if (card_piix_ide[0x04] & 1)
io_sethandler(base, 0x10, piix_bus_master_read, NULL, NULL, piix_bus_master_write, NULL, NULL, NULL);
}
// pclog("PIIX write %02X %02X\n", addr, val);
}
else
{
switch (addr)
{
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x08: case 0x09: case 0x0a: case 0x0b:
case 0x0e:
return;
}
if (addr == 0x6A)
{
if (piix_type == 1)
card_piix[addr] = (val & 0xFC) | (card_piix[addr] | 3);
else if (piix_type == 3)
card_piix[addr] = (val & 0xFD) | (card_piix[addr] | 2);
}
else
card_piix[addr] = val;
}
}
